arm: dts: rockchip: Add LDR format image for RAM boot

arch/arm/dts/rockchip-u-boot.dtsi

@@ -259,5 +259,115 @@
 		};
 	};
 #endif /* CONFIG_ROCKCHIP_MASKROM_IMAGE */
+
+/*
+ * RAM-loaded SPL configuration for Maskrom boot development.
+ *
+ * When CONFIG_SPL_RAM is enabled, SPL is loaded directly into DRAM via
+ * Rockchip's USB download mode (rkdeveloptool/upgrade_tool). This creates
+ * special images for that workflow:
+ *
+ * u-boot-rockchip-ram.bin - Plain binary layout:
+ *   [0x00000 - 0x1ffff] SPL padded to 128KB (SPL_RAM_PAD_SIZE)
+ *   [0x20000 - ...]     u-boot.itb (FIT with U-Boot + ATF + DTB)
+ *
+ * u-boot-rockchip-ram-ldr.bin - LDR format bundle:
+ *   Rockchip native loader format compatible with rkdeveloptool/upgrade_tool.
+ *   - 471 entry: TPL for DRAM initialization (runs in SRAM)
+ *   - 472 entry: SPL + FIT concatenated (runs from DRAM)
+ *
+ * USB download workflow with plain binary:
+ *   1. rkdeveloptool db <tpl.bin>              (download TPL to init DRAM)
+ *   2. rkdeveloptool wl 0 u-boot-rockchip-ram.bin (write SPL+FIT to DRAM)
+ *
+ * USB download workflow with LDR bundle:
+ *   1. rkdeveloptool db u-boot-rockchip-ram-ldr.bin (single command boots)
+ */
+/*
+ * SPL_RAM_PAD_SIZE: Size to pad SPL when building RAM-loadable images.
+ * This is 128KB (0x20000), matching the typical offset where FIT is loaded
+ * relative to SPL in DRAM. When CONFIG_SPL_RAM is enabled, CONFIG_SPL_MAX_SIZE
+ * is often 0 (unlimited), so we use a fixed value here.
+ */
+#define SPL_RAM_PAD_SIZE 0x20000
+
+#ifdef CONFIG_SPL_RAM_DEVICE
+	/*
+	 * Plain binary: SPL padded + u-boot.itb concatenated.
+	 * SPL is padded to 128KB, followed by the FIT image.
+	 */
+	simple-bin-ram {
+		filename = "u-boot-rockchip-ram.bin";
+		pad-byte = <0x00>;
+
+		u-boot-spl {
+			no-write-symbols;
+		};
+
+#ifdef HAS_FIT
+		fit {
+			insert-template = <&fit_template>;
+			offset = <SPL_RAM_PAD_SIZE>;
+		};
+#else
+		u-boot-img {
+			offset = <SPL_RAM_PAD_SIZE>;
+		};
+#endif
+	};
+
+	/*
+	 * LDR format bundle: Native Rockchip loader format.
+	 * Compatible with rkdeveloptool db command for single-step boot.
+	 * - 471 entry: TPL (DDR init, runs in SRAM)
+	 * - 472 entry: SPL+FIT concatenated (runs from DRAM)
+	 *
+	 * Note: filename uses .bin extension for rkdeveloptool compatibility
+	 * (rkdeveloptool checks filename extension to determine file type)
+	 */
+	ldr-image {
+		filename = "u-boot-rockchip-ram-ldr.bin";
+
+		rockchip-ldr {
+			rockchip,rc4-off;
+
+			entry-471 {
+				type = "section";
+				rockchip,entry-type = "471";
+				rockchip,entry-name = "DDR";
+				rockchip,entry-delay = <1>;
+
+#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
+				rockchip-tpl {
+				};
+#elif defined(CONFIG_TPL)
+				u-boot-tpl {
+				};
+#endif
+			};
+
+			entry-472 {
+				type = "section";
+				rockchip,entry-type = "472";
+				rockchip,entry-name = "SPL";
+
+				u-boot-spl {
+					no-write-symbols;
+				};
+
+#ifdef HAS_FIT
+				fit {
+					insert-template = <&fit_template>;
+					offset = <SPL_RAM_PAD_SIZE>;
+				};
+#else
+				u-boot-img {
+					offset = <SPL_RAM_PAD_SIZE>;
+				};
+#endif
+			};
+		};
+	};
+#endif /* CONFIG_SPL_RAM */
 };
 #endif /* CONFIG_SPL */