boards: riscv: esp32c3: added button support

in samples for esp32c3 devkitm_board using GPIO9

Signed-off-by: Felipe Neves <[email protected]>

Author: Felipe Neves

boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts

@@ -26,7 +26,7 @@
 		compatible = "gpio-keys";
 		user_button1: button_1 {
 			label = "User SW1";
-			gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
 		};
 	};
 };

boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig

@@ -13,4 +13,4 @@ CONFIG_XIP=n
 CONFIG_PINMUX=y
 CONFIG_PINMUX_ESP32=y
 CONFIG_GPIO=y
-CONFIG_GPIO_ESP32=y
+CONFIG_GPIO_ESP32=y

drivers/gpio/Kconfig.esp32

@@ -17,11 +17,14 @@ config GPIO_ESP32_0
 	help
 	  Include support for GPIO pins 0-31 on the ESP32.
 
+if !SOC_ESP32C3
+
 config GPIO_ESP32_1
 	bool "ESP32 GPIO (pins 32-39)"
-	default y if SOC_ESP32 || SOC_ESP32S2
-	default n if SOC_ESP32C3
+	default y
 	help
 	  Include support for GPIO pins 32-39 on the ESP32.
 
+endif # SOC_ESP32C3
+
 endif # GPIO_ESP32

drivers/gpio/gpio_esp32.c

@@ -8,15 +8,13 @@
 #define DT_DRV_COMPAT espressif_esp32_gpio
 
 /* Include esp-idf headers first to avoid redefining BIT() macro */
-#ifndef CONFIG_SOC_ESP32C3
-#include <soc/dport_reg.h>
-#endif
 #include <soc/gpio_reg.h>
 #include <soc/io_mux_reg.h>
 #include <soc/soc.h>
 #include <hal/gpio_ll.h>
 #include <esp_attr.h>
 
+#include <soc.h>
 #include <errno.h>
 #include <device.h>
 #include <drivers/gpio.h>
@@ -37,15 +35,15 @@ LOG_MODULE_REGISTER(gpio_esp32, CONFIG_LOG_DEFAULT_LEVEL);
 #define DEV_CFG(_dev) ((struct gpio_esp32_config *const)(_dev)->config)
 
 #ifdef CONFIG_SOC_ESP32C3
-/* gpio structs in esp32c3 series are diferent from xtensa ones */
+/* gpio structs in esp32c3 series are different from xtensa ones */
 #define out out.data
 #define in in.data
 #define out_w1ts out_w1ts.val
 #define out_w1tc out_w1tc.val
 /* arch_curr_cpu() is not available for riscv based chips */
 #define CPU_ID()  0
 #define ISR_HANDLER isr_handler_t
-#else 
+#else
 #define CPU_ID() arch_curr_cpu()->id
 #define ISR_HANDLER intr_handler_t
 #endif
@@ -293,6 +291,7 @@ static int gpio_esp32_pin_interrupt_configure(const struct device *port,
 
 	key = irq_lock();
 	gpio_ll_set_intr_type(cfg->gpio_base, io_pin, intr_trig_mode);
+	gpio_ll_intr_enable_on_core(cfg->gpio_base, CPU_ID(), io_pin);
 	irq_unlock(key);
 
 	return 0;
@@ -357,7 +356,12 @@ static int gpio_esp32_init(const struct device *dev)
 	}
 
 	if (!isr_connected) {
-		esp_intr_alloc(DT_IRQN(DT_NODELABEL(gpio0)), 0, (ISR_HANDLER)gpio_esp32_isr, (void *)dev, NULL);
+		esp_intr_alloc(DT_IRQN(DT_NODELABEL(gpio0)),
+			0,
+			(ISR_HANDLER)gpio_esp32_isr,
+			(void *)dev,
+			NULL);
+
 		isr_connected = true;
 	}
 

dts/riscv/espressif/esp32c3.dtsi

@@ -38,7 +38,7 @@
 
 		pinmux: pinmux@60009000 {
 			compatible = "espressif,esp32-pinmux";
-			reg = <0x60009000 0x94>;
+			reg = <0x60009000 0x800>;
 		};
 
 		intc: interrupt-controller@600c2000 {

west.yml

@@ -62,7 +62,7 @@ manifest:
       groups:
         - hal
     - name: hal_espressif
-      revision: 2f438dfde14900d35bf703ddc4c0f71efc0d065f
+      revision: 051266aafbd966825bad1d9b5ab98e8bed45b918
       path: modules/hal/espressif
       west-commands: west/west-commands.yml
       groups: