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Move LY and LYC to STAT page (#469)
Also rename stat's title to LCD Status Registers. Change some links pointing to it, to point to STAT. Make a new STAT modes section for other pages to link to when modes are mentioned Co-authored-by: Eldred Habert <[email protected]>
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src/CGB_Registers.md

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@@ -180,7 +180,7 @@ And the following will keep operating as usual:
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The CPU stops for 2050 cycles (= 8200 clocks) after the `stop` instruction is
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executed. During this time, the CPU is in a strange state. `DIV` does not tick, so
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*some* audio events are not processed. Additionally, VRAM/OAM/... locking is "frozen", yielding
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different results depending on the [STAT mode](<#FF41 — STAT: LCD status>) it's started in:
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different results depending on the [STAT mode](<#STAT modes>) it's started in:
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- HBlank / VBlank (Mode 0 / Mode 1): The PPU cannot access any video memory, and produces black pixels
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- OAM scan (Mode 2): The PPU can access VRAM just fine, but not OAM, leading to rendering background, but not sprites

src/Interrupt_Sources.md

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## INT $40 — VBlank interrupt
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This interrupt is requested every time the Game Boy enters VBlank ([Mode 1](<#FF41 — STAT: LCD status>)).
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This interrupt is requested every time the Game Boy enters VBlank ([Mode 1](<#STAT modes>)).
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The VBlank interrupt occurs ca. 59.7 times a second on a handheld Game
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Boy (DMG or CGB) or Game Boy Player and ca. 61.1 times a second on a

src/OAM.md

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While it is also possible to write data directly to the OAM area
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[by accessing it normally](<#OAM (memory area at $FE00-$FE9F) is accessible during Modes 0-1>),
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this only works [during the HBlank and VBlank periods](<#LCD Status Register>).
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this only works [during the HBlank and VBlank periods](<#STAT modes>).
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## Object Priority and Conflicts
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src/Palettes.md

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```
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Much like VRAM, data in palette memory cannot be read or written during the time
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when the PPU is reading from it, that is, [Mode 3](<#LCD Status Register>).
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when the PPU is reading from it, that is, [Mode 3](<#STAT modes>).
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::: tip NOTE
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src/STAT.md

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# LCD Status Register
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# LCD Status Registers
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::: tip TERMINOLOGY
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A *dot* is the shortest period over which the PPU can output one pixel: is it equivalent to 1 T-state on DMG or on CGB single-speed mode or 2 T-states on CGB double-speed mode. On each dot during mode 3, either the PPU outputs a pixel or the fetcher is stalling the [FIFOs](<#Pixel FIFO>).
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:::
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## FF44 — LY: LCD Y coordinate \[read-only\]
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LY indicates the current horizontal line, which might be about to be drawn,
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being drawn, or just been drawn. LY can hold any value from 0 to 153, with
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values from 144 to 153 indicating the VBlank period.
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## FF45 — LYC: LY compare
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The Game Boy constantly compares the value of the LYC and LY registers.
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When both values are identical, the "LYC=LY" flag in the STAT register
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is set, and (if enabled) a STAT interrupt is requested.
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## FF41 — STAT: LCD status
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```
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Bits 3-6 select which sources are used for [the STAT interrupt](<#INT $48 — STAT interrupt>).
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## STAT modes
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The LCD controller operates on a 2^22 Hz = 4.194 MHz dot clock. An
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entire frame is 154 scanlines = 70224 dots = 16.74 ms. On scanlines 0
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through 143, the PPU cycles through modes 2, 3, and 0 once

src/SUMMARY.md

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- [OAM](./OAM.md)
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- [OAM DMA Transfer](./OAM_DMA_Transfer.md)
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- [LCD Control](./LCDC.md)
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- [LCD Status](./STAT.md)
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- [LCD Status Registers](./STAT.md)
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- [Scrolling](./Scrolling.md)
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- [Palettes](./Palettes.md)
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- [Pixel FIFO](./pixel_fifo.md)

src/Scrolling.md

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Those specify the top-left coordinates of the visible 160×144 pixel area within the
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256×256 pixels BG map. Values in the range 0–255 may be used.
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## FF44 — LY: LCD Y coordinate \[read-only\]
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LY indicates the current horizontal line, which might be about to be drawn,
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being drawn, or just been drawn. LY can hold any value from 0 to 153, with
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values from 144 to 153 indicating the VBlank period.
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## FF45 — LYC: LY compare
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The Game Boy permanently compares the value of the LYC and LY registers.
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When both values are identical, the "LYC=LY" flag in the STAT register
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is set, and (if enabled) a STAT interrupt is requested.
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## FF4A–FF4B — WY, WX: Window Y position, X position plus 7
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Specify the top-left coordinates of [the Window](#Window).

src/Tile_Maps.md

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[LCDC bit 5](<#LCDC.5 — Window enable>). But in Non-CGB mode this bit is only
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functional as long as [LCDC bit 0](<#LCDC.0 — BG and Window enable/priority>) is set.
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Enabling the Window makes
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[Mode 3](<#LCD Status Register>) slightly longer on scanlines where it's visible.
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[Mode 3](<#STAT modes>) slightly longer on scanlines where it's visible.
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(See [WX and WY](<#FF4A–FF4B — WY, WX: Window Y position, X position plus 7>)
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for the definition of "Window visibility".)
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