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opencl: fix incorrect local_size index in profiling log (#12868) Server #12909: Commit 12b1750 pushed by max-krasnyansky
8m 27s master
master
8m 27s
opencl: fix incorrect local_size index in profiling log (#12868) EditorConfig Checker #24147: Commit 12b1750 pushed by max-krasnyansky
16s master
master
16s
opencl: fix incorrect local_size index in profiling log (#12868) CI #21534: Commit 12b1750 pushed by max-krasnyansky
14s master
master
14s
threading: support for GGML_SCHED_PRIO_LOW, update thread info on Win… Python check requirements.txt #2882: Commit 25ed1a3 pushed by max-krasnyansky
2m 56s maxk/sched-prio-updates
maxk/sched-prio-updates
2m 56s
threading: support for GGML_SCHED_PRIO_LOW, update thread info on Win… Python Type-Check #2363: Commit 25ed1a3 pushed by max-krasnyansky
1m 26s maxk/sched-prio-updates
maxk/sched-prio-updates
1m 26s
vulkan: enable coopmat2 FA gqa and split_k optimizations more often (… CI #21533: Commit 015022b pushed by 0cc4m
49m 6s master
master
49m 6s
vulkan: enable coopmat2 FA gqa and split_k optimizations more often (… EditorConfig Checker #24146: Commit 015022b pushed by 0cc4m
19s master
master
19s
vulkan: enable coopmat2 FA gqa and split_k optimizations more often (… Server #12908: Commit 015022b pushed by 0cc4m
9m 59s master
master
9m 59s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs EditorConfig Checker #24145: Pull request #12858 synchronize by Rbiessy
34s Alcpz:Alcpz/mmvq_q4_0_reorder
Alcpz:Alcpz/mmvq_q4_0_reorder
34s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs CI #21532: Pull request #12858 synchronize by Rbiessy
53m 26s Alcpz:Alcpz/mmvq_q4_0_reorder
Alcpz:Alcpz/mmvq_q4_0_reorder
53m 26s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs Server #12907: Pull request #12858 synchronize by Rbiessy
11m 3s Alcpz:Alcpz/mmvq_q4_0_reorder
Alcpz:Alcpz/mmvq_q4_0_reorder
11m 3s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs Pull Request Labeler #10215: Pull request #12858 synchronize by Rbiessy
18s
18s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs EditorConfig Checker #24144: Pull request #12858 synchronize by Rbiessy
44s Alcpz:Alcpz/mmvq_q4_0_reorder
Alcpz:Alcpz/mmvq_q4_0_reorder
44s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs Pull Request Labeler #10214: Pull request #12858 synchronize by Rbiessy
38s
38s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs Server #12906: Pull request #12858 synchronize by Rbiessy
1m 58s Alcpz:Alcpz/mmvq_q4_0_reorder
Alcpz:Alcpz/mmvq_q4_0_reorder
1m 58s
sycl : implementation of reordered Q4_0 MMVQ for Intel GPUs CI #21531: Pull request #12858 synchronize by Rbiessy
2m 0s Alcpz:Alcpz/mmvq_q4_0_reorder
Alcpz:Alcpz/mmvq_q4_0_reorder
2m 0s
llama-bench : Add --override-tensors arg EditorConfig Checker #24143: Pull request #12922 synchronize by 4onen
21s 4onen:llama-bench-tensor-override
4onen:llama-bench-tensor-override
21s
llama-bench : Add --override-tensors arg Server #12905: Pull request #12922 synchronize by 4onen
9m 8s 4onen:llama-bench-tensor-override
4onen:llama-bench-tensor-override
9m 8s
llama-bench : Add --override-tensors arg CI #21530: Pull request #12922 synchronize by 4onen
42m 59s 4onen:llama-bench-tensor-override
4onen:llama-bench-tensor-override
42m 59s
llama-bench : Add --override-tensors arg Pull Request Labeler #10213: Pull request #12922 synchronize by 4onen
11s
11s
main : Fix Ctrl+D/newline handling CI #21529: Pull request #12951 synchronize by danielzgtg
40m 42s danielzgtg:fix/ctrld
danielzgtg:fix/ctrld
40m 42s
main : Fix Ctrl+D/newline handling EditorConfig Checker #24142: Pull request #12951 synchronize by danielzgtg
19s danielzgtg:fix/ctrld
danielzgtg:fix/ctrld
19s
main : Fix Ctrl+D/newline handling Server #12904: Pull request #12951 synchronize by danielzgtg
8m 37s danielzgtg:fix/ctrld
danielzgtg:fix/ctrld
8m 37s
main : Fix Ctrl+D/newline handling Pull Request Labeler #10212: Pull request #12951 synchronize by danielzgtg
14s
14s
Llama-3_1-Nemotron-Ultra-253B-v1 support CI #21528: Pull request #12843 synchronize by ymcki
54m 7s ymcki:master
ymcki:master
54m 7s