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ggml : fix I8MM Q4_1 scaling factor conversion #10562
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                ggml/src/ggml-cpu/ggml-cpu-quants.c
              
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      | float32_t _scale[4] = { | ||
| GGML_FP16_TO_FP32(b_x0->d)*GGML_FP16_TO_FP32(b_y0->d), | ||
| GGML_FP16_TO_FP32(b_x0->d)*GGML_FP16_TO_FP32(b_y1->d), | ||
| GGML_FP16_TO_FP32(b_x1->d)*GGML_FP16_TO_FP32(b_y0->d), | ||
| GGML_FP16_TO_FP32(b_x1->d)*GGML_FP16_TO_FP32(b_y1->d)}; | 
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This fixes a bug where the y->d was not converted to F32, resulting in completely wrong numbers when going through this CPU branch.
        
          
                ggml/src/ggml-cpu/ggml-cpu-quants.c
              
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      | const block_q8_0 * restrict vy1 = (const block_q8_0 *) ((const uint8_t*)vy + by); | ||
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| float32x4_t sumv0 = vdupq_n_f32(0.0f); | ||
| if (ggml_cpu_has_matmul_int8()) { | 
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We need to remove the ARM runtime feature detection completely, it doesn't work at all and never will. So I would prefer if at least we don't make that task worse by adding more checks like this.
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Ok, I will change the PR to just include the F16 -> F32 fix in the Q4_1 kernel.
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target #10561
These changes fixillegal instructioncrash on M1 Pro which does not do a runtime check for the availability of I8MM. We now checkggml_cpu_has_matmul_int8()and if it is false, we unpack the 2x2 multiplication into 4 dot products.This fix aside, I am wondering if we should drop the
int nrcsupport in theggml_vec_dotkernels to keep it simple and proceed to implement proper GEMMs similar to the work inggml-cpu-aarch64.c?