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ggml : riscv: add xtheadvector support #13720

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Merged
merged 2 commits into from
May 27, 2025
Merged

ggml : riscv: add xtheadvector support #13720

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2695c0a
ggml : riscv: add xtheadvector support
xctan May 22, 2025
d28364a
ggml : clean up some macro usage
xctan May 27, 2025
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1 change: 1 addition & 0 deletions ggml/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -129,6 +129,7 @@ option(GGML_LASX "ggml: enable lasx" ON)
option(GGML_LSX "ggml: enable lsx" ON)
option(GGML_RVV "ggml: enable rvv" ON)
option(GGML_RV_ZFH "ggml: enable riscv zfh" OFF)
option(GGML_XTHEADVECTOR "ggml: enable xtheadvector" OFF)
option(GGML_VXE "ggml: enable vxe" ON)

option(GGML_CPU_ALL_VARIANTS "ggml: build all variants of the CPU backend (requires GGML_BACKEND_DL)" OFF)
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6 changes: 4 additions & 2 deletions ggml/src/ggml-cpu/CMakeLists.txt
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Expand Up @@ -338,8 +338,10 @@ function(ggml_add_cpu_backend_variant_impl tag_name)
elseif (${CMAKE_SYSTEM_PROCESSOR} MATCHES "riscv64")
message(STATUS "RISC-V detected")
if (GGML_RVV)
if (GGML_RV_ZFH)
list(APPEND ARCH_FLAGS -march=rv64gcv_zfhmin -DGGML_RV_ZFH -mabi=lp64d)
if (GGML_XTHEADVECTOR)
list(APPEND ARCH_FLAGS -march=rv64gc_xtheadvector -mabi=lp64d)
elseif (GGML_RV_ZFH)
list(APPEND ARCH_FLAGS -march=rv64gcv_zfhmin -mabi=lp64d)
else()
list(APPEND ARCH_FLAGS -march=rv64gcv -mabi=lp64d)
endif()
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4 changes: 2 additions & 2 deletions ggml/src/ggml-cpu/ggml-cpu-aarch64.cpp
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Expand Up @@ -1191,7 +1191,7 @@ static void ggml_gemv_q4_0_8x8_q8_0(int n, float * GGML_RESTRICT s, size_t bs, c
}
}
return;
#elif defined(__riscv_v_intrinsic)
#elif defined(__riscv_v_intrinsic) && !defined(__riscv_xtheadvector)
if (__riscv_vlenb() >= QK4_0) {
const size_t vl = QK4_0;

Expand Down Expand Up @@ -3783,7 +3783,7 @@ static void ggml_gemm_q4_0_8x8_q8_0(int n, float * GGML_RESTRICT s, size_t bs, c
}
return;
}
#elif defined(__riscv_v_intrinsic)
#elif defined(__riscv_v_intrinsic) && !defined(__riscv_xtheadvector)
if (__riscv_vlenb() >= QK4_0) {
const size_t vl = QK4_0;

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