Merge pull request #2865 from HiFiPhile/rt1170

RT1170 enhancements

Author: hathach

.gitignore

@@ -1,16 +1,20 @@
 html
 latex
+*.a
 *.d
 *.o
 *.P
-*.map
 *.axf
 *.bin
-*.jlink
-*.emSession
 *.elf
+*.env
 *.ind
-.env
+*.log
+*.map
+*.obj
+*.jlink
+*.emSession
+*.ninja*
 .settings/
 .vscode/
 .gdb_history

examples/device/audio_test_multi_rate/src/main.c

@@ -85,7 +85,7 @@ audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1];
 
 
 // Audio test data
-CFG_TUSB_MEM_ALIGN uint8_t test_buffer_audio[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
+CFG_TUD_MEM_ALIGN uint8_t test_buffer_audio[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
 uint16_t startVal = 0;
 
 void led_blinking_task(void);

hw/bsp/broadcom_32bit/family.cmake

@@ -106,5 +106,6 @@ function(family_configure_example TARGET RTOS)
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
+  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()

hw/bsp/broadcom_64bit/family.cmake

@@ -113,5 +113,6 @@ function(family_configure_example TARGET RTOS)
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
+  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()

hw/bsp/f1c100s/family.cmake

@@ -110,5 +110,6 @@ function(family_configure_example TARGET RTOS)
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
+  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()

hw/bsp/family_support.cmake

@@ -300,10 +300,17 @@ endfunction()
 
 # Add bin/hex output
 function(family_add_bin_hex TARGET)
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
-    COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
-    VERBATIM)
+  if (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    add_custom_command(TARGET ${TARGET} POST_BUILD
+      COMMAND ${CMAKE_OBJCOPY} --bin $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
+      COMMAND ${CMAKE_OBJCOPY} --ihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
+      VERBATIM)
+  else()
+    add_custom_command(TARGET ${TARGET} POST_BUILD
+      COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
+      COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
+      VERBATIM)
+  endif()
 endfunction()
 
 # Add uf2 output

hw/bsp/gd32vf103/family.cmake

@@ -117,5 +117,6 @@ function(family_configure_example TARGET RTOS)
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
+  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()

hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake

@@ -1,16 +1,25 @@
 set(MCU_VARIANT MIMXRT1176)
-set(MCU_CORE _cm7)
 
-set(JLINK_DEVICE MIMXRT1176xxxA_M7)
-set(PYOCD_TARGET mimxrt1170_cm7)
+if (M4 STREQUAL "1")
+  set(MCU_CORE _cm4)
+  set(JLINK_CORE _M4)
+  set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
+  set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+else ()
+  set(MCU_CORE _cm7)
+  set(JLINK_CORE _M7)
+endif()
+
+set(JLINK_DEVICE MIMXRT1176xxxA${JLINK_CORE})
+set(PYOCD_TARGET mimxrt1170${MCU_CORE})
 set(NXPLINK_DEVICE MIMXRT1176xxxxx:MIMXRT1170-EVK)
 
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbmimxrt1170_flexspi_nor_config.c
     )
   target_compile_definitions(${TARGET} PUBLIC
-    CPU_MIMXRT1176DVMAA_cm7
+    CPU_MIMXRT1176DVMAA${MCU_CORE}
     BOARD_TUD_RHPORT=0
     BOARD_TUH_RHPORT=1
     )

hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk

@@ -1,12 +1,22 @@
-CFLAGS += -DCPU_MIMXRT1176DVMAA_cm7
 MCU_VARIANT = MIMXRT1176
-MCU_CORE = _cm7
+
+ifeq ($(M4), 1)
+  MCU_CORE = _cm4
+  JLINK_CORE = _M4
+  CPU_CORE = cortex-m4
+  LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx${MCU_CORE}_ram.ld
+else
+  MCU_CORE = _cm7
+  JLINK_CORE = _M7
+endif
+
+CFLAGS += -DCPU_MIMXRT1176DVMAA$(MCU_CORE)
 
 # For flash-jlink target
-JLINK_DEVICE = MIMXRT1176xxxA_M7
+JLINK_DEVICE = MIMXRT1176xxxA$(JLINK_CORE)
 
 # For flash-pyocd target
-PYOCD_TARGET = mimxrt1170_cm7
+PYOCD_TARGET = mimxrt1170$(MCU_CORE)
 
 BOARD_TUD_RHPORT = 0
 BOARD_TUH_RHPORT = 1

hw/bsp/imxrt/boards/mimxrt1170_evkb/board/clock_config.c

@@ -11,11 +11,11 @@
 
 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: Clocks v12.0
+product: Clocks v14.0
 processor: MIMXRT1176xxxxx
 package_id: MIMXRT1176DVMAA
 mcu_data: ksdk2_0
-processor_version: 14.0.1
+processor_version: 16.3.0
 board: MIMXRT1170-EVKB
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
 
@@ -335,7 +335,6 @@ void BOARD_BootClockRUN(void)
 
     /* Init OSC RC 400M */
     CLOCK_OSC_EnableOscRc400M();
-    CLOCK_OSC_GateOscRc400M(false);
 
     /* Init OSC RC 48M */
     CLOCK_OSC_EnableOsc48M(true);
@@ -349,22 +348,29 @@ void BOARD_BootClockRUN(void)
     {
     }
 
-    /* Switch both core, M7 Systick and Bus_Lpsr to OscRC48MDiv2 first */
+    /* Switch core M7 clock root to OscRC48MDiv2 first */
 #if __CORTEX_M == 7
     rootCfg.mux = kCLOCK_M7_ClockRoot_MuxOscRc48MDiv2;
     rootCfg.div = 1;
     CLOCK_SetRootClock(kCLOCK_Root_M7, &rootCfg);
+#endif
 
+    /* Switch core M7 systick clock root to OscRC48MDiv2 first */
+#if __CORTEX_M == 7
     rootCfg.mux = kCLOCK_M7_SYSTICK_ClockRoot_MuxOscRc48MDiv2;
     rootCfg.div = 1;
     CLOCK_SetRootClock(kCLOCK_Root_M7_Systick, &rootCfg);
 #endif
 
+    /* Switch core M4 clock root to OscRC48MDiv2 first */
 #if __CORTEX_M == 4
     rootCfg.mux = kCLOCK_M4_ClockRoot_MuxOscRc48MDiv2;
     rootCfg.div = 1;
     CLOCK_SetRootClock(kCLOCK_Root_M4, &rootCfg);
+#endif
 
+    /* Switch the Bus_Lpsr clock root to OscRC48MDiv2 first */
+#if __CORTEX_M == 4
     rootCfg.mux = kCLOCK_BUS_LPSR_ClockRoot_MuxOscRc48MDiv2;
     rootCfg.div = 1;
     CLOCK_SetRootClock(kCLOCK_Root_Bus_Lpsr, &rootCfg);