-
Notifications
You must be signed in to change notification settings - Fork 49
A10 USB
Henrik Nordstrom edited this page Jul 24, 2012
·
4 revisions
There is three USB controllers. One OTG controller and two HOST-only. They all seem to be based on the same USB host controller.
The driver is not sharing any code with other USB drivers. Seem to be a wrapper around some os-independent driver code for the USB controller.
- Kernel: https://github.com/amery/linux-allwinner/tree/allwinner-v3.0-android-v2/drivers/usb/sun4i_usb
- u-boot: https://github.com/hno/uboot-allwinner/tree/lichee/lichee-dev/arch/arm/cpu/armv7/sunxi/usb
usb0 is a USB 2.0 OTG controller with both host and gadget mode.
in gadget mode up to 5 endpoints is supported.
GPIO pins are used for ID & power control.
usb1 is an USB 2.0 HOST-only controller.
GPIO pins are used for power control.
usb2 is an USB 2.0 HOST-only controller.
GPIO pins are used for power control.
Bit #
- 7 0x80 ISO_UPDATE_EN (Device only)
- 6 0x40 SOFT_CONNECT (Device only)
- 5 0x20 HIGH_SPEED_EN
- 4 0x10 HIGH_SPEED_FLAG
- 3 0x08 RESET
- 2 0x04 RESUME
- 1 0x02 SUSPEND
- 0 0x01 SUSPEND_EN
Bit #
- 7 0x80 B_DEVICE
- 6 0x40 FS_DEV
- 5 0x20 LS_DEV
- 4 0x10 ????
- 3 0x08 VBUS
- 2 0x04 HOST_MODE
- 1 0x02 HOST_REQ
- 0 0x01 SESSION
Current active endpoint (0-5).
Bit #
- 1- 0xXX DRQ_SEL
- 0 0x01 BUS_SEL
BUS_SEL = 1 for DMA?
DRQ_SEL = ((ep_index - 0x01) << 1) for TX type endpoints
DRQ_SEL = ((ep_index << 1) - 0x01) for RX type endpoints
- 5 EP5
- 4 EP4
- 3 EP3
- 2 EP2
- 1 EP1
- 0 EP0
- 5 EP5
- 4 EP4
- 3 EP3
- 2 EP2
- 1 EP1
- 5 EP5
- 4 EP4
- 3 EP3
- 2 EP2
- 1 EP1
- 0 EP0
- 5 EP5
- 4 EP4
- 3 EP3
- 2 EP2
- 1 EP1
- 7 VBUS_ERROR
- 6 SESSION_REQ
- 5 DISCONNECT
- 4 CONNECT
- 3 SOF
- 2 RESET
- 1 RESUME
- 0 SUSPEND
- 7 EN_VBUS_ERROR
- 6 EN_SESSION_REQ
- 5 EN_DISCONNECT
- 4 EN_CONNECT
- 3 EN_SOF
- 2 EN_RESET
- 1 EN_RESUME
- 0 EN_SUSPEND
Old register location. See new location below.
- 7 FORCE_HOST
- 6 FIFO_ACCESS
- 5 FORCE_FS
- 4 FORCE_HS
- 3 TEST_PACKET
- 2 TEST_K
- 1 TEST_J
- 0 TEST_SE0_NAK
- 11- PACKET_COUNT
- 0-10 MAXIMUM_PAYLOAD
Note: Packet count only valid if the EP is capable of automatic split of large bulk transfers. PACKET_COUNT * MAXIMUM_PAYLOAD need to be smaller than the FIFO size set in TXFIFOSZ.
Host mode:
- 11 DisPing
- 8 FlushFIFO
- 7 NAK_Timeout
- 6 StatusPkt
- 5 ReqPkt
- 4 Error
- 3 SetupPkt
- 2 RxStall
- 1 TxPkRdy
- 0 RxPkRdy
Device mode:
- 8 FLUSH_FIFO
- 7 SERVICED_SETUP_END
- 6 SERVICED_RX_PKT_READY
- 5 SEND_STALL
- 4 SETUP_END
- 3 DATA_END
- 2 SENT_STALL
- 1 TX_PKT_READY
- 0 RX_PKT_READY
- 15 AUTOSET
- 14 ISO (device only)
- 13 MODE
- 12 DMA_REQ_EN
- 11 FORCE_DATA_TOGGLE
- 10 DMA_REQ_MODE
- 9 DATA_TOGGLE_WR_EN (host only)
- 8 DATA_TOGGLE (host only)
- 7 INCOMPLETE (device only)
- 7 NAK_TIMEOUT (host only) (write 1 to clear)
- 6 CLEAR_DATA_TOGGLE
- 5 TX_STALL (host only) (write 1 to clear)
- 5 SENT_STALL (device only)
- 4 SEND_STALL (device only)
- 3 FLUSH_FIFO
- 2 UNDER_RUN (device only)
- 2 ERROR (host only) (write 1 to clear)
- 1 FIFO_NOT_EMPTY (write 1 to clear)
- 0 TX_READY
- 11- PACKET_COUNT
- 0-10 MAXIMUM_PAYLOAD
Note: PACKET_COUNT * MAXIMUM_PAYLOAD need to be smaller than the FIFO size set in TXFIFOSZ.
- 15 AUTO_CLEAR
- 14 AUTO_REQ (host)
- 14 ISO (device)
- 13 DMA_REQ_EN
- 12 DISABLE_NYET (device)
- 12 DISNYET (host)
- 12 PID_ERROR (host)
- 11 DMA_REQ_MODE
- 10 DATA_TOGGLE_WR_EN (host)
- 9 DATA_TOGGLE (host)
- 8 INCOMPLETE
- 7 CLEAR_DATA_TOGGLE
- 6 RX_STALL (host) (write 1 to clear)
- 6 SENT_STALL (device)
- 5 REQ_PACKET (host)
- 5 SEND_STALL (device)
- 4 FLUSH_FIFO
- 3 DATA_ERR (iso/device) (write 1 to clear)
- 3 NAK_TIMEOUT (bulk)
- 2 ERROR (host) (write 1 to clear)
- 2 OVERRUN (device)
- 1 FIFO_FULL
- 0 RX_PKT_READY (write 1 to clear)
- 6- SPEED
- 4-5 PROROCOL
- 0-3 TARGET_EP_NUM
- 6- SPEED
- 4-5 PROROCOL
- 0-3 TARGET_EP_NUM
- 4- DPB Hardware double FIFO
- 0-3 SZ FIFO size = (SZ + 3)^2. Aligned to 512.
TX fifo address / 8
- 4- DPB Hardware double FIFO
- 0-3 SZ FIFO size = (SZ + 3)^2. Aligned to 512.
RX fifo address / 8
- 7 MultiTT
- 0-6 hub address
- 7 MultiTT
- 0-6 hub address
- 7 MPRXE
- 6 MPTXE
- 5 BIGENDIAN
- 4 HBRXE
- 3 HBTXE
- 2 DYNFIFO_SIZING
- 1 SOFTCONE
- 0 UTMI_DATAWIDTH 0 = UTMI-8 1 = UTMI-16
- 30 VBUS_VALID_FROM_DATA
- 29 VBUS_VALID_FROM_VBUS
- 28 EXT_ID_STATUS
- 27 EXT_DM_STATUS
- 26 EXT_DP_STATUS
- 25 MERGED_VBUS_STATUS
- 24 MERGED_ID_STATUS
- 17 ID_PULLUP_EN
- 16 DPDM_PULLUP_EN
- 14 FORCE_ID
- 12 FORCE_VBUS_VALID
- 10 VBUS_VALID_SRC
- 7 HOSC_EN
- 6 VBUS_CHANGE_DETECT
- 5 ID_CHANGE_DETECT
- 4 DPDM_CHANGE_DETECT
- 3 IRQ_ENABLE
- 2 VBUS_CHANGE_DETECT_EN
- 1 ID_CHANGE_DETECT_EN
- 0 DPDM_CHANGE_DETECT_EN
<->
Remaining header details to sort
//-----------------------------------------------------------------------
// Custom
//-----------------------------------------------------------------------
/* usb resource description */
#define USBC_MAX_CTL_NUM 3
#define USBC_MAX_EP_NUM 6 /* Can support the maximum ep No., ep0~5 */
#define USBC0_MAX_FIFO_SIZE (8 * 1024)
#define USBC_EP0_FIFOSIZE 64 /* This is non-configurable */
/* usb OTG mode */
#define USBC_OTG_HOST 0
#define USBC_OTG_DEVICE 1
/* usb device type */
#define USBC_DEVICE_HSDEV 0
#define USBC_DEVICE_FSDEV 1
#define USBC_DEVICE_LSDEV 2
/* usb transfer type */
#define USBC_TS_TYPE_IDLE 0
#define USBC_TS_TYPE_CTRL 1
#define USBC_TS_TYPE_ISO 2
#define USBC_TS_TYPE_INT 3
#define USBC_TS_TYPE_BULK 4
/* usb transfer mode */
#define USBC_TS_MODE_UNKOWN 0
#define USBC_TS_MODE_LS 1
#define USBC_TS_MODE_FS 2
#define USBC_TS_MODE_HS 3
/* usb Vbus status */
#define USBC_VBUS_STATUS_BELOW_SESSIONEND 0
#define USBC_VBUS_STATUS_ABOVE_SESSIONEND_BELOW_AVALID 1
#define USBC_VBUS_STATUS_ABOVE_AVALID_BELOW_VBUSVALID 2
#define USBC_VBUS_STATUS_ABOVE_VBUSVALID 3
/* usb io type */
#define USBC_IO_TYPE_PIO 0
#define USBC_IO_TYPE_DMA 1
/* usb ep type */
#define USBC_EP_TYPE_IDLE 0
#define USBC_EP_TYPE_EP0 1
#define USBC_EP_TYPE_TX 2
#define USBC_EP_TYPE_RX 3
/* usb id type */
#define USBC_ID_TYPE_DISABLE 0
#define USBC_ID_TYPE_HOST 1
#define USBC_ID_TYPE_DEVICE 2
/* usb vbus valid type */
#define USBC_VBUS_TYPE_DISABLE 0
#define USBC_VBUS_TYPE_LOW 1
#define USBC_VBUS_TYPE_HIGH 2
/* usb a valid source */
#define USBC_A_VALID_SOURCE_UTMI_AVALID 0
#define USBC_A_VALID_SOURCE_UTMI_VBUS 1
/* usb device switch */
#define USBC_DEVICE_SWITCH_OFF 0
#define USBC_DEVICE_SWITCH_ON 1
/* usb fifo config mode */
#define USBC_FIFO_MODE_4K 0
#define USBC_FIFO_MODE_8K 1