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Merge tag 'spi-nor/for-6.16' into mtd/next
SPI NOR changes for 6.16 Notable changes: - Cleanup some Macronix flash entries. - Add SFDP table fixups for Macronix MX25L3255E.
2 parents 0aa7b39 + 594c8df commit 73c4699

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+39
-34
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drivers/mtd/spi-nor/macronix.c

Lines changed: 39 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,31 @@ macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
5858
return 0;
5959
}
6060

61+
static int
62+
mx25l3255e_late_init_fixups(struct spi_nor *nor)
63+
{
64+
struct spi_nor_flash_parameter *params = nor->params;
65+
66+
/*
67+
* SFDP of MX25L3255E is JESD216, which does not include the Quad
68+
* Enable bit Requirement in BFPT. As a result, during BFPT parsing,
69+
* the quad_enable method is not set to spi_nor_sr1_bit6_quad_enable.
70+
* Therefore, it is necessary to correct this setting by late_init.
71+
*/
72+
params->quad_enable = spi_nor_sr1_bit6_quad_enable;
73+
74+
/*
75+
* In addition, MX25L3255E also supports 1-4-4 page program in 3-byte
76+
* address mode. However, since the 3-byte address 1-4-4 page program
77+
* is not defined in SFDP, it needs to be configured in late_init.
78+
*/
79+
params->hwcaps.mask |= SNOR_HWCAPS_PP_1_4_4;
80+
spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_4_4],
81+
SPINOR_OP_PP_1_4_4, SNOR_PROTO_1_4_4);
82+
83+
return 0;
84+
}
85+
6186
static const struct spi_nor_fixups mx25l25635_fixups = {
6287
.post_bfpt = mx25l25635_post_bfpt_fixups,
6388
.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
@@ -67,6 +92,10 @@ static const struct spi_nor_fixups macronix_qpp4b_fixups = {
6792
.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
6893
};
6994

95+
static const struct spi_nor_fixups mx25l3255e_fixups = {
96+
.late_init = mx25l3255e_late_init_fixups,
97+
};
98+
7099
static const struct flash_info macronix_nor_parts[] = {
71100
{
72101
.id = SNOR_ID(0xc2, 0x20, 0x10),
@@ -88,10 +117,8 @@ static const struct flash_info macronix_nor_parts[] = {
88117
.name = "mx25l8005",
89118
.size = SZ_1M,
90119
}, {
120+
/* MX25L1606E */
91121
.id = SNOR_ID(0xc2, 0x20, 0x15),
92-
.name = "mx25l1606e",
93-
.size = SZ_2M,
94-
.no_sfdp_flags = SECT_4K,
95122
}, {
96123
.id = SNOR_ID(0xc2, 0x20, 0x16),
97124
.name = "mx25l3205d",
@@ -103,29 +130,21 @@ static const struct flash_info macronix_nor_parts[] = {
103130
.size = SZ_8M,
104131
.no_sfdp_flags = SECT_4K,
105132
}, {
133+
/* MX25L12805D */
106134
.id = SNOR_ID(0xc2, 0x20, 0x18),
107-
.name = "mx25l12805d",
108-
.size = SZ_16M,
109135
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
110-
.no_sfdp_flags = SECT_4K,
111136
}, {
137+
/* MX25L25635E, MX25L25645G */
112138
.id = SNOR_ID(0xc2, 0x20, 0x19),
113-
.name = "mx25l25635e",
114-
.size = SZ_32M,
115-
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
116139
.fixups = &mx25l25635_fixups
117140
}, {
141+
/* MX66L51235F */
118142
.id = SNOR_ID(0xc2, 0x20, 0x1a),
119-
.name = "mx66l51235f",
120-
.size = SZ_64M,
121-
.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
122143
.fixup_flags = SPI_NOR_4B_OPCODES,
123144
.fixups = &macronix_qpp4b_fixups,
124145
}, {
146+
/* MX66L1G45G */
125147
.id = SNOR_ID(0xc2, 0x20, 0x1b),
126-
.name = "mx66l1g45g",
127-
.size = SZ_128M,
128-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
129148
.fixups = &macronix_qpp4b_fixups,
130149
}, {
131150
/* MX66L2G45G */
@@ -167,29 +186,16 @@ static const struct flash_info macronix_nor_parts[] = {
167186
.size = SZ_16M,
168187
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
169188
}, {
189+
/* MX25U51245G */
170190
.id = SNOR_ID(0xc2, 0x25, 0x3a),
171-
.name = "mx25u51245g",
172-
.size = SZ_64M,
173-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
174-
.fixup_flags = SPI_NOR_4B_OPCODES,
175-
.fixups = &macronix_qpp4b_fixups,
176-
}, {
177-
.id = SNOR_ID(0xc2, 0x25, 0x3a),
178-
.name = "mx66u51235f",
179-
.size = SZ_64M,
180-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
181-
.fixup_flags = SPI_NOR_4B_OPCODES,
182191
.fixups = &macronix_qpp4b_fixups,
183192
}, {
184193
/* MX66U1G45G */
185194
.id = SNOR_ID(0xc2, 0x25, 0x3b),
186195
.fixups = &macronix_qpp4b_fixups,
187196
}, {
197+
/* MX66U2G45G */
188198
.id = SNOR_ID(0xc2, 0x25, 0x3c),
189-
.name = "mx66u2g45g",
190-
.size = SZ_256M,
191-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
192-
.fixup_flags = SPI_NOR_4B_OPCODES,
193199
.fixups = &macronix_qpp4b_fixups,
194200
}, {
195201
.id = SNOR_ID(0xc2, 0x26, 0x18),
@@ -215,15 +221,14 @@ static const struct flash_info macronix_nor_parts[] = {
215221
.size = SZ_4M,
216222
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
217223
}, {
224+
/* MX25UW51245G */
218225
.id = SNOR_ID(0xc2, 0x81, 0x3a),
219-
.name = "mx25uw51245g",
220226
.n_banks = 4,
221227
.flags = SPI_NOR_RWW,
222228
}, {
229+
/* MX25L3255E */
223230
.id = SNOR_ID(0xc2, 0x9e, 0x16),
224-
.name = "mx25l3255e",
225-
.size = SZ_4M,
226-
.no_sfdp_flags = SECT_4K,
231+
.fixups = &mx25l3255e_fixups,
227232
},
228233
/*
229234
* This spares us of adding new flash entries for flashes that can be

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