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pratikasharsys_zuul
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Verification pass for explicit variable split phase. Pass can be enabled
using -verifysplit switch. Change-Id: I9a73a37bb0ca75891c0e082459db3e752eedadc2
1 parent 9353d62 commit d2f9929

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visa/VarSplit.cpp

Lines changed: 136 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,11 +34,147 @@ VarSplitPass::VarSplitPass(G4_Kernel& k) : kernel(k)
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{
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}
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void VarSplitPass::buildPreVerify()
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{
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for (auto bb : kernel.fg.getBBList())
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{
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for (auto inst : bb->getInstList())
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{
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if (inst->getDst())
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{
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splitVerify[inst].dst = inst->getDst();
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splitVerify[inst].dstLb = inst->getDst()->getLeftBound();
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splitVerify[inst].dstRb = inst->getDst()->getRightBound();
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}
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for (unsigned int i = 0; i != G4_MAX_SRCS; i++)
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{
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if (inst->getSrc(i) && inst->getSrc(i)->isSrcRegRegion())
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{
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splitVerify[inst].src[i] = inst->getSrc(i);
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splitVerify[inst].srcLb[i] = inst->getSrc(i)->getLeftBound();
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splitVerify[inst].srcRb[i] = inst->getSrc(i)->getRightBound();
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}
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}
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}
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}
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}
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void VarSplitPass::verify()
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{
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// verify
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// parent, <child, <lb, rb>>
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std::unordered_map<G4_Declare*, std::unordered_map<G4_Declare*, std::pair<unsigned int, unsigned int>>> parentSplit;
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std::unordered_set<G4_Declare*> splitDcls;
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auto getChildData = [&](G4_Declare* child)
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{
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std::pair<unsigned int, unsigned int> childLbRb = { 0,0 };
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bool found = false;
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for (auto& item : parentSplit)
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{
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for (auto& itemCh : (item).second)
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{
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if (itemCh.first == child)
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{
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MUST_BE_TRUE(!found, "Duplicate lb/rb entry found");
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childLbRb = itemCh.second;
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found = true;
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}
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}
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}
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MUST_BE_TRUE(found, "Didnt find child dcl");
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return childLbRb;
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};
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// create parent->child mapping
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for (auto bb : kernel.fg.getBBList())
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{
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for (auto inst : bb->getInstList())
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{
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if (inst->isSplitIntrinsic())
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{
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// ensure this is split mov instruction
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MUST_BE_TRUE(inst->isSplitIntrinsic(), "Didnt expect new non-split intrinsic instruction");
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// verify that split instruction's dst, src(0) is correct
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splitDcls.insert(inst->getDst()->getTopDcl());
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MUST_BE_TRUE(!inst->getSrc(0)->getTopDcl()->getAddressed(), "Shouldnt split indirectly addressed variable");
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auto origSrc0 = inst->getSrc(0)->asSrcRegRegion();
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auto origLb = origSrc0->getLeftBound();
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auto origRb = origSrc0->getRightBound();
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auto itemToInsert = std::make_pair(inst->getDst()->getTopDcl(), std::make_pair((unsigned int)origLb, (unsigned int)origRb));
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parentSplit[origSrc0->getTopDcl()].insert(itemToInsert);
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}
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}
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}
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// now check whether usage of child is correct
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std::unordered_map<G4_Declare*, unsigned int> parentDefCount;
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for (auto bb : kernel.fg.getBBList())
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{
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for (auto inst : bb->getInstList())
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{
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auto dst = inst->getDst();
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if (dst && splitDcls.find(dst->getTopDcl()) != splitDcls.end())
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{
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MUST_BE_TRUE(inst->isSplitIntrinsic(), "Found split dcl as dst in non-split intrinsic instruction");
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}
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if (dst && parentSplit.find(dst->getTopDcl()) != parentSplit.find(dst->getTopDcl()))
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{
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auto oldDefCount = parentDefCount[dst->getTopDcl()];
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parentDefCount[dst->getTopDcl()] = oldDefCount + 1;
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MUST_BE_TRUE(oldDefCount == 0, "Found second def of parent of split variable");
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}
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for (unsigned int i = 0; i != G4_MAX_SRCS; i++)
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{
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auto src = inst->getSrc(i);
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if (!src || !src->asSrcRegRegion())
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continue;
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if (splitDcls.find(src->asSrcRegRegion()->getTopDcl()) == splitDcls.end())
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continue; // not a split dcl
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// src is a split dcl, verify its usage is consistent with pre-transformation data structure
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auto lb = src->getLeftBound();
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auto rb = src->getRightBound();
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auto childData = getChildData(src->asSrcRegRegion()->getTopDcl());
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auto childLb = childData.first;
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//auto childRb = childData.second;
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auto totalLb = childLb + lb;
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auto totalRb = totalLb + rb;
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auto origInstData = splitVerify[inst];
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auto origLb = origInstData.srcLb[i];
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auto origRb = origInstData.srcRb[i];
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MUST_BE_TRUE(origLb == totalLb, "Mismatch in lb");
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MUST_BE_TRUE(origRb == totalRb, "Mismatch in rb");
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}
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}
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}
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printf("Split verification passed successfully!\n");
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}
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void VarSplitPass::run()
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{
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if (kernel.getOption(vISA_VerifyExplicitSplit))
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buildPreVerify();
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findSplitCandidates();
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split();
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if (kernel.getOption(vISA_VerifyExplicitSplit))
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verify();
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}
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void VarSplitPass::findSplitCandidates()

visa/VarSplit.h

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -97,6 +97,33 @@ class VarSplitPass
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// Store pre-split regions for undo
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// <new src/dst region, <old src inst, old src rgn, old src#>>
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std::unordered_map<G4_Operand*, std::tuple<G4_INST*, G4_Operand*, unsigned int>> preSplit;
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private:
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// Split verification related declarations
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void buildPreVerify();
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void verify();
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class InstData
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{
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public:
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G4_DstRegRegion* dst = nullptr;
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unsigned int dstLb = 0;
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unsigned int dstRb = 0;
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G4_Operand* src[G4_MAX_SRCS];
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unsigned int srcLb[G4_MAX_SRCS];
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unsigned int srcRb[G4_MAX_SRCS];
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InstData()
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{
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for (unsigned int i = 0; i != G4_MAX_SRCS; i++)
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{
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src[i] = nullptr;
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srcLb[i] = 0;
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srcRb[i] = 0;
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}
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}
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};
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std::unordered_map<G4_INST*, InstData> splitVerify;
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};
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};
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#endif

visa/include/VISAOptions.def

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,7 @@ DEF_VISA_OPTION(vISA_hierarchicaIPA, ET_BOOL, "-oldIPA", UNUSED, true)
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DEF_VISA_OPTION(vISA_IntrinsicSplit, ET_BOOL, "-doSplit", UNUSED, false)
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DEF_VISA_OPTION(vISA_VerifyAugmentation, ET_BOOL, "-verifyaugmentation", UNUSED, false)
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DEF_VISA_OPTION(vISA_VerifyExplicitSplit, ET_BOOL, "-verifysplit", UNUSED, false)
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//=== scheduler options ===
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DEF_VISA_OPTION(vISA_LocalScheduling, ET_BOOL, "-noschedule", UNUSED, true)

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