1212
1313#include " amd/include/Dialect/TritonAMDGPU/IR/Dialect.h"
1414#include " amd/include/TritonAMDGPUTransforms/Passes.h"
15- #include " third_party/nvidia/include/Dialect/NVGPU/IR/Dialect.h"
16- #include " third_party/nvidia/include/Dialect/NVWS/IR/Dialect.h"
17- #include " third_party/proton/dialect/include/Dialect/Proton/IR/Dialect.h"
15+ #include " nvidia/include/Dialect/NVGPU/IR/Dialect.h"
16+ #include " nvidia/include/Dialect/NVWS/IR/Dialect.h"
17+ #include " proton/Dialect/include/Conversion/ProtonGPUToLLVM/Passes.h"
18+ #include " proton/Dialect/include/Conversion/ProtonGPUToLLVM/ProtonAMDGPUToLLVM/Passes.h"
19+ #include " proton/Dialect/include/Conversion/ProtonGPUToLLVM/ProtonNvidiaGPUToLLVM/Passes.h"
20+ #include " proton/Dialect/include/Conversion/ProtonToProtonGPU/Passes.h"
21+ #include " proton/Dialect/include/Dialect/Proton/IR/Dialect.h"
22+ #include " proton/Dialect/include/Dialect/ProtonGPU/IR/Dialect.h"
23+ #include " proton/Dialect/include/Dialect/ProtonGPU/Transforms/Passes.h"
1824#include " triton/Dialect/Gluon/Transforms/Passes.h"
1925#include " triton/Dialect/Triton/IR/Dialect.h"
2026#include " triton/Dialect/TritonGPU/IR/Dialect.h"
@@ -58,6 +64,9 @@ void registerTestMembarPass();
5864void registerTestAMDGPUMembarPass ();
5965void registerTestTritonAMDGPURangeAnalysis ();
6066void registerTestLoopPeelingPass ();
67+ namespace proton {
68+ void registerTestScopeIdAllocationPass ();
69+ } // namespace proton
6170} // namespace test
6271} // namespace mlir
6372
@@ -127,6 +136,16 @@ inline void registerTritonDialects(mlir::DialectRegistry ®istry) {
127136 // NVGPU transform passes
128137 mlir::registerNVHopperTransformsPasses ();
129138
139+ // Proton passes
140+ mlir::test::proton::registerTestScopeIdAllocationPass ();
141+ mlir::triton::proton::registerConvertProtonToProtonGPU ();
142+ mlir::triton::proton::gpu::registerConvertProtonNvidiaGPUToLLVM ();
143+ mlir::triton::proton::gpu::registerConvertProtonAMDGPUToLLVM ();
144+ mlir::triton::proton::gpu::registerAllocateProtonSharedMemoryPass ();
145+ mlir::triton::proton::gpu::registerAllocateProtonGlobalScratchBufferPass ();
146+ mlir::triton::proton::gpu::registerScheduleBufferStorePass ();
147+ mlir::triton::proton::gpu::registerAddSchedBarriersPass ();
148+
130149 registry.insert <
131150 mlir::triton::TritonDialect, mlir::cf::ControlFlowDialect,
132151 mlir::triton::nvidia_gpu::TritonNvidiaGPUDialect,
@@ -136,7 +155,8 @@ inline void registerTritonDialects(mlir::DialectRegistry ®istry) {
136155 mlir::gpu::GPUDialect, mlir::LLVM::LLVMDialect, mlir::NVVM::NVVMDialect,
137156 mlir::triton::nvgpu::NVGPUDialect, mlir::triton::nvws::NVWSDialect,
138157 mlir::triton::amdgpu::TritonAMDGPUDialect,
139- mlir::triton::proton::ProtonDialect, mlir::ROCDL::ROCDLDialect,
158+ mlir::triton::proton::ProtonDialect,
159+ mlir::triton::proton::gpu::ProtonGPUDialect, mlir::ROCDL::ROCDLDialect,
140160 mlir::triton::gpu::intel::TritonIntelGPUDialect,
141161 mlir::triton::TritonGEN::TritonGENDialect,
142162 mlir::triton::gluon::GluonDialect>();
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