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0ca51af
[WIP]: Fuse load and trans operations
etiotto Jun 4, 2025
cd406fb
Merge remote-tracking branch 'origin/main' into etiotto.merge_load_wi…
etiotto Jun 5, 2025
07599e3
Limit candidates to operations with no associated region.
etiotto Jun 5, 2025
b1a2c1f
Allow candidates in for loop
etiotto Jun 6, 2025
5eafc6b
Fix precommit
etiotto Jun 6, 2025
0422ad6
Merge branch 'main' into etiotto.merge_load_with_trans.2
etiotto Jun 6, 2025
5181bb3
Better traces
etiotto Jun 6, 2025
2329dd7
Allow fusing load+trans when load ptr is loop carried
etiotto Jun 9, 2025
475eef7
Fix failing tutorial 09
etiotto Jun 10, 2025
a2fa44c
Merge remote-tracking branch 'origin/main' into etiotto.merge_load_wi…
etiotto Jun 11, 2025
617dc0d
Allow trans user to be any operation as long as def-use chain end is …
etiotto Jun 12, 2025
dd8979d
Address code review comments
etiotto Jun 17, 2025
d3cb92b
Address code review comments
etiotto Jun 17, 2025
c1a6949
Address code review comments
etiotto Jun 18, 2025
e344c13
Allow trans user to be any operation as long as def-use chain end is …
etiotto Jun 19, 2025
e7d0d74
Merge remote-tracking branch 'origin/main' into etiotto.merge_load_wi…
etiotto Jun 20, 2025
8e6ee3e
Merge remote-tracking branch 'origin/main' into etiotto.merge_load_wi…
etiotto Jun 20, 2025
53b26ec
Fix precommit
etiotto Jun 20, 2025
23a1ef5
Enable tutorial 06 with tt.trans when data type is not fp8
etiotto Jun 20, 2025
ff7a5a8
Merge remote-tracking branch 'origin/main' into etiotto.merge_load_wi…
etiotto Jun 23, 2025
79ee3e6
Merge remote-tracking branch 'origin/main' into etiotto.merge_load_wi…
etiotto Jun 23, 2025
22db300
Address code review comments
etiotto Jun 24, 2025
0745f28
Address code review comments
etiotto Jun 25, 2025
0d68f06
Address code review comments
etiotto Jun 25, 2025
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191 changes: 186 additions & 5 deletions test/TritonIntelGPU/dot-operands.mlir

Large diffs are not rendered by default.

1 change: 1 addition & 0 deletions third_party/intel/backend/compiler.py
Original file line number Diff line number Diff line change
Expand Up @@ -280,6 +280,7 @@ def make_ttgir(mod, metadata, opt, properties):
intel.passes.ttgpuir.add_accelerate_matmul(pm)
intel.passes.ttgpuir.add_materialize_block_pointer(pm)
intel.passes.ttgpuir.add_remove_layout_conversions(pm)
intel.passes.ttgpuir.add_optimize_dot_operands(pm)
intel.passes.ttgpuir.add_pipeline(pm, opt.num_stages, XPUBackend.get_split_barrier_scope(opt))

if (opt.reduce_variable_liveness):
Expand Down
3 changes: 3 additions & 0 deletions third_party/intel/include/Utils/Utility.h
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,9 @@ bool isConstant(Value val, int64_t expected);

Value getFinalValue(Value value);

// Erase the operations in \p operations.
void eraseOperations(SmallPtrSetImpl<Operation *> &operations);

} // namespace mlir::triton::intel

#endif // TRITON_INTEL_UTILS_UTILITY_H
Original file line number Diff line number Diff line change
Expand Up @@ -95,7 +95,9 @@ struct TritonIntelTensorDescToBlockPointer
.Default([&](auto) { return WalkResult::advance(); });
});

finalize();
if (!cleanUp.empty())
tt::intel::eraseOperations(cleanUp);

assert(succeeded(verify(moduleOp)) && "Module verification failed");
}

Expand Down Expand Up @@ -267,31 +269,6 @@ struct TritonIntelTensorDescToBlockPointer
return success();
}

void finalize() {
// Cleanup unused operations.
bool erasedOperation;
do {
erasedOperation = false;
SmallPtrSet<Operation *, 8> erased;
for (Operation *op : cleanUp) {
if (!op->getUsers().empty() || !op->getRegions().empty())
continue;

erased.insert(op);
op->erase();
erasedOperation = true;
}
cleanUp.remove_if([&](Operation *op) { return erased.contains(op); });
} while (erasedOperation);

// Remove operations that contain a region.
for (Operation *op : cleanUp) {
if (!op->getUsers().empty())
continue;
op->erase();
}
}

private:
SmallPtrSet<Operation *, 8> cleanUp;
};
Expand Down
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