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A tracking utility for gathering the compile and/or runtime time, size, profiling and other statistics #4777

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1 change: 1 addition & 0 deletions .github/workflows/triton-benchmarks.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,7 @@ env:
VERIFY: ${{ (github.event_name == 'pull_request' || github.event_name == 'schedule' || inputs.verify) && '1' || '0' }}
TAG: ${{ inputs.tag || (github.event_name == 'pull_request' && format('pr-{0}', github.event.number)) || (github.event_name == 'schedule' && 'ci') || 'test' }}
N_RUNS: ${{ inputs.n_runs || '1' }}
TRITON_TRACK_DUMP: "$PWD/reports/track"
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Let's make it optional depending on input from user. It can cause overhead, which can generally be avoided.

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I would also enable this profiling for some test in intel folder at least.


jobs:
build:
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38 changes: 38 additions & 0 deletions python/src/ir.cc
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Expand Up @@ -1814,6 +1814,44 @@ void init_triton_ir(py::module &&m) {
self.printAsTextualPipeline(os);
return str;
})
.def("enable_timing",
[](PassManager &self, py::function cb) {
struct CallBackStrategy : OutputStrategy {
py::function cb;

CallBackStrategy(py::function cb)
: OutputStrategy(llvm::errs()), cb(cb) {}

void printHeader(const TimeRecord &total) override {}

void printFooter() override {}

void printTime(const TimeRecord &time,
const TimeRecord &total) override {}

void printListEntry(StringRef name, const TimeRecord &time,
const TimeRecord &total,
bool lastEntry = false) override {
cb(std::string(name), time.wall, 0);
}

void printTreeEntry(unsigned indent, StringRef name,
const TimeRecord &time,
const TimeRecord &total) override {
cb(std::string(name), time.wall, 1);
}

void printTreeEntryEnd(unsigned indent,
bool lastEntry = false) override {
cb(std::string(""), 0., 2);
}
};

auto tm = std::make_unique<mlir::DefaultTimingManager>();
tm->setOutput(std::make_unique<CallBackStrategy>(cb));
tm->setEnabled(true);
self.enableTiming(std::move(tm));
})
.def(
"run",
[](PassManager &self, ModuleOp &mod) {
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11 changes: 9 additions & 2 deletions third_party/intel/backend/compiler.py
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Expand Up @@ -13,6 +13,7 @@
import os
import subprocess
from pathlib import Path
from .track import track
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To be aligned with current style and move it to top of this file.

Suggested change
from .track import track
from triton.backends.intel.track import track



@dataclass
Expand Down Expand Up @@ -211,6 +212,7 @@ def get_split_barrier_scope(opt):
return split_barriers_scope

@staticmethod
@track
def make_ttir(mod, metadata, opt):
pm = ir.pass_manager(mod.context)
pm.enable_debug()
Expand All @@ -230,6 +232,7 @@ def make_ttir(mod, metadata, opt):
return mod

@staticmethod
@track
def make_ttgir(mod, metadata, opt, properties):
cluster_info = intel.ClusterInfo()
if opt.cluster_dims is not None:
Expand Down Expand Up @@ -307,6 +310,7 @@ def gluon_to_ttgir(self, src, metadata, options):
return mod

@staticmethod
@track
def make_llir(src, metadata, options):
mod = src
# TritonGPU -> LLVM-IR (MLIR)
Expand Down Expand Up @@ -348,7 +352,9 @@ def make_llir(src, metadata, options):
paths = [path for (name, path) in options.extern_libs]
llvm.link_extern_libs(llvm_mod, paths)

intel.optimize_module(llvm_mod, llvm.OPTIMIZE_O3)
with track("optimize_module") as tr:
intel.optimize_module(llvm_mod, llvm.OPTIMIZE_O3, tr.callback("passes"))

intel.post_process_llir(llvm_mod)

# Get some metadata
Expand All @@ -367,6 +373,7 @@ def make_llir(src, metadata, options):
return ret

@staticmethod
@track
def make_spv(src, metadata, options, device_arch):
spirv, name = intel.translate_to_spirv(src)
metadata["name"] = name
Expand Down Expand Up @@ -394,7 +401,7 @@ def make_spv(src, metadata, options, device_arch):
metadata["generate_native_code"] = options.generate_native_code

if options.generate_native_code:
with tempfile.TemporaryDirectory() as temp_dir:
with track("generate_native_code"), tempfile.TemporaryDirectory() as temp_dir:
with tempfile.NamedTemporaryFile(mode='wb', suffix='.spv', dir=temp_dir, delete=False) as fsrc:
fsrc.write(spirv)
fbin = fsrc.name + '.o'
Expand Down
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