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[Draft] Transpose 2d load. #4870

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c464166
[LoadStoreOpToLLVM] Refactor block load lowering of tt.load with tens…
chengjunlu Jul 21, 2025
55c896e
Transposed 2d load.
chengjunlu Aug 11, 2025
1999a52
Update third_party/intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp
etiotto Aug 11, 2025
9cd2944
Apply suggestions from code review
etiotto Aug 11, 2025
dd08a34
Address code review comment
etiotto Aug 11, 2025
20a1637
Merge branch 'main' into chengjun/trans_2d_load
etiotto Aug 13, 2025
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57 changes: 39 additions & 18 deletions python/test/unit/intel/test_block_store.py
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Original file line number Diff line number Diff line change
Expand Up @@ -119,52 +119,69 @@ def warps_per_cta(layout):
@pytest.mark.parametrize("dtype_str", ["float32", "float16", "int8"])
@pytest.mark.parametrize("layout", layouts)
@pytest.mark.parametrize("block_ptr", [True, False])
@pytest.mark.parametrize("transpose", [True, False])
@pytest.mark.skipif(not is_xpu(), reason="Block store tests are specific to the XPU backend")
def test_block_store(M, N, dtype_str, layout, block_ptr, device, tmp_path: pathlib.Path):
def test_block_store(M, N, dtype_str, layout, block_ptr, transpose, device, tmp_path: pathlib.Path):

warps = warps_per_cta(layout)
num_warps = int(np.prod(warps))
threads_per_warp = layout.threads_per_warp

threads_per_warp = int(np.prod(threads_per_warp))

ty = {"float32": "f32", "float16": "f16", "bfloat16": "i16", "int8": "i8"}[dtype_str]

support_block_io = torch.xpu.get_device_capability()['has_subgroup_2d_block_io']

block_io = "\"column_major\"" if transpose else "\"row_major\""

if block_ptr:
load_ops = f"""
%src_ptr = tt.make_tensor_ptr %src, [%M_i64, %N_i64], {"[%c1_i64, %M_i64]" if transpose else "[%N_i64, %c1_i64]"}, [%c0_i32, %c0_i32] {{order = array<i32: 1, 0>}} : <tensor<{M}x{N}x{ty}, #layout>>
%store_val = tt.load %src_ptr {{ttig.block_io = {block_io}, boundaryCheck = array<i32: 0, 1>, padding = 1 : i32}} : !tt.ptr<tensor<{M}x{N}x{ty}, #layout>>
"""
store_ops = f"""
%M_i64 = arith.constant {M} : i64
%N_i64 = arith.constant {N} : i64
%c1_i64 = arith.constant 1 : i64
%c0_i32 = arith.constant 0 : i32

%blk_ptr = tt.make_tensor_ptr %dst, [%M_i64, %N_i64], [%N_i64, %c1_i64], [%c0_i32, %c0_i32] {{order = array<i32: 1, 0>}} : <tensor<{M}x{N}x{ty}, #layout>>
tt.store %blk_ptr, %store_val {{ttig.block_io = "row_major", boundaryCheck = array<i32: 0, 1>}} : !tt.ptr<tensor<{M}x{N}x{ty}, #layout>>
%dst_ptr = tt.make_tensor_ptr %dst, [%M_i64, %N_i64], [%N_i64, %c1_i64], [%c0_i32, %c0_i32] {{order = array<i32: 1, 0>}} : <tensor<{M}x{N}x{ty}, #layout>>
tt.store %dst_ptr, %store_val {{ttig.block_io = "row_major", boundaryCheck = array<i32: 0, 1>}} : !tt.ptr<tensor<{M}x{N}x{ty}, #layout>>
"""
else:
load_ops = f"""
%src_base = tt.splat %src : !tt.ptr<{ty}> -> tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
%src_ptr = tt.addptr %src_base, {"%col_major_off" if transpose else "%row_major_off" } : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>, tensor<{M}x{N}xi32, #layout>
%store_val = tt.load %src_ptr {{ttig.block_io = {block_io}}} : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
"""
store_ops = f"""
%12 = tt.splat %dst : !tt.ptr<{ty}> -> tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
%13 = tt.addptr %12, %8 : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>, tensor<{M}x{N}xi32, #layout>
tt.store %13, %store_val {{ttig.block_io = "row_major"}} : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
%dst_base = tt.splat %dst : !tt.ptr<{ty}> -> tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
%dst_ptr = tt.addptr %dst_base, %row_major_off : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>, tensor<{M}x{N}xi32, #layout>
tt.store %dst_ptr, %store_val {{ttig.block_io = "row_major"}} : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
"""

ir = f"""
#layout = {layout}
module attributes {{{"ttig.support_sg_2d_block," if support_block_io else ""} "ttg.num-ctas" = 1 : i32, "ttg.num-warps" = {num_warps} : i32, ttg.target = "xpu", "ttg.threads-per-warp" = {threads_per_warp} : i32}} {{
tt.func public @block_store(%src: !tt.ptr<{ty}> {{tt.divisibility = 16 : i32}}, %dst: !tt.ptr<{ty}> {{tt.divisibility = 16 : i32}}) {{

%stride = arith.constant dense<{N}> : tensor<{M}x1xi32, #layout>
%M_i64 = arith.constant {M} : i64
%N_i64 = arith.constant {N} : i64
%c1_i64 = arith.constant 1 : i64
%c0_i32 = arith.constant 0 : i32
%stride_N = arith.constant dense<{N}> : tensor<{M}x1xi32, #layout>
%1 = tt.make_range {{end = {M} : i32, start = 0 : i32}} : tensor<{M}xi32, #ttg.slice<{{dim = 1, parent = #layout}}>>
%2 = tt.expand_dims %1 {{axis = 1 : i32}} : tensor<{M}xi32, #ttg.slice<{{dim = 1, parent = #layout}}>> -> tensor<{M}x1xi32, #layout>
%3 = arith.muli %2, %stride : tensor<{M}x1xi32, #layout>
%row_stride = arith.muli %2, %stride_N : tensor<{M}x1xi32, #layout>
%4 = tt.make_range {{end = {N} : i32, start = 0 : i32}} : tensor<{N}xi32, #ttg.slice<{{dim = 0, parent = #layout}}>>
%5 = tt.expand_dims %4 {{axis = 0 : i32}} : tensor<{N}xi32, #ttg.slice<{{dim = 0, parent = #layout}}>> -> tensor<1x{N}xi32, #layout>
%6 = tt.broadcast %3 : tensor<{M}x1xi32, #layout> -> tensor<{M}x{N}xi32, #layout>
%6 = tt.broadcast %row_stride : tensor<{M}x1xi32, #layout> -> tensor<{M}x{N}xi32, #layout>
%7 = tt.broadcast %5 : tensor<1x{N}xi32, #layout> -> tensor<{M}x{N}xi32, #layout>
%8 = arith.addi %6, %7 : tensor<{M}x{N}xi32, #layout>
%9 = tt.splat %src : !tt.ptr<{ty}> -> tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
%10 = tt.addptr %9, %8 : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>, tensor<{M}x{N}xi32, #layout>
%store_val = tt.load %10 : tensor<{M}x{N}x!tt.ptr<{ty}>, #layout>
%row_major_off = arith.addi %6, %7 : tensor<{M}x{N}xi32, #layout>


%stride_M = arith.constant dense<{M}> : tensor<1x{N}xi32, #layout>
%col_stride = arith.muli %5, %stride_M : tensor<1x{N}xi32, #layout>
%8 = tt.broadcast %2 : tensor<{M}x1xi32, #layout> -> tensor<{M}x{N}xi32, #layout>
%9 = tt.broadcast %col_stride : tensor<1x{N}xi32, #layout> -> tensor<{M}x{N}xi32, #layout>
%col_major_off = arith.addi %8, %9 : tensor<{M}x{N}xi32, #layout>
{load_ops}

{store_ops}

Expand All @@ -185,8 +202,12 @@ def test_block_store(M, N, dtype_str, layout, block_ptr, device, tmp_path: pathl
temp_file.write_text(ir)
kernel = triton.compile(str(temp_file))

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Copilot AI Aug 11, 2025

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The double permutation a.permute(1, 0).contiguous().permute(1, 0) appears to transpose, make contiguous, then transpose back. This should be documented or simplified if the intent is just to make the tensor contiguous in a specific memory layout.

Suggested change
# The following idiom makes the tensor Fortran-contiguous (column-major order) if transpose is True.
# This is required for the kernel to test handling of non-default memory layouts.

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a = a.permute(1, 0).contiguous().permute(1, 0) if transpose else a

kernel[(1, 1, 1)](a, x)
assert torch.equal(a, x)

if support_block_io:
assert 'spirv_Subgroup2DBlockStoreINTEL' in kernel.asm['llir'] or 'GenISA.LSC2DBlockWrite' in kernel.asm['llir']
if not block_ptr:
assert 'spirv_Subgroup2DBlockLoad' in kernel.asm['llir'] or 'GenISA.LSC2DBlockRead' in kernel.asm['llir']
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