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| 1 | +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| 2 | +; Copyright(c) 2023 Intel Corporation All rights reserved. |
| 3 | +; |
| 4 | +; Redistribution and use in source and binary forms, with or without |
| 5 | +; modification, are permitted provided that the following conditions |
| 6 | +; are met: |
| 7 | +; * Redistributions of source code must retain the above copyright |
| 8 | +; notice, this list of conditions and the following disclaimer. |
| 9 | +; * Redistributions in binary form must reproduce the above copyright |
| 10 | +; notice, this list of conditions and the following disclaimer in |
| 11 | +; the documentation and/or other materials provided with the |
| 12 | +; distribution. |
| 13 | +; * Neither the name of Intel Corporation nor the names of its |
| 14 | +; contributors may be used to endorse or promote products derived |
| 15 | +; from this software without specific prior written permission. |
| 16 | +; |
| 17 | +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 18 | +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 19 | +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 20 | +; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 21 | +; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 22 | +; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 23 | +; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 24 | +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 25 | +; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 26 | +; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 27 | +; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 28 | +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| 29 | + |
| 30 | +;;; |
| 31 | +;;; gf_5vect_mad_avx2_gfni(len, vec, vec_i, mul_array, src, dest); |
| 32 | +;;; |
| 33 | + |
| 34 | +%include "reg_sizes.asm" |
| 35 | +%include "gf_vect_gfni.inc" |
| 36 | +%include "memcpy.asm" |
| 37 | + |
| 38 | +%if AS_FEATURE_LEVEL >= 10 |
| 39 | + |
| 40 | +%ifidn __OUTPUT_FORMAT__, elf64 |
| 41 | + %define arg0 rdi |
| 42 | + %define arg1 rsi |
| 43 | + %define arg2 rdx |
| 44 | + %define arg3 rcx |
| 45 | + %define arg4 r8 |
| 46 | + %define arg5 r9 |
| 47 | + %define tmp r11 |
| 48 | + %define tmp2 r10 |
| 49 | + %define tmp3 r12 |
| 50 | + %define tmp4 r13 |
| 51 | + %define func(x) x: endbranch |
| 52 | + %define stack_size 2*8 |
| 53 | + %macro FUNC_SAVE 0 |
| 54 | + sub rsp, stack_size |
| 55 | + mov [rsp + 0*8], r12 |
| 56 | + mov [rsp + 1*8], r13 |
| 57 | + %endmacro |
| 58 | + %macro FUNC_RESTORE 0 |
| 59 | + mov r12, [rsp + 0*8] |
| 60 | + mov r13, [rsp + 1*8] |
| 61 | + add rsp, stack_size |
| 62 | + %endmacro |
| 63 | +%endif |
| 64 | + |
| 65 | +%ifidn __OUTPUT_FORMAT__, win64 |
| 66 | + %define arg0 rcx |
| 67 | + %define arg1 rdx |
| 68 | + %define arg2 r8 |
| 69 | + %define arg3 r9 |
| 70 | + %define arg4 r12 ; must be saved, loaded and restored |
| 71 | + %define arg5 r13 ; must be saved and restored |
| 72 | + %define tmp r11 |
| 73 | + %define tmp2 r10 |
| 74 | + %define tmp3 r14 |
| 75 | + %define tmp4 r15 |
| 76 | + %define stack_size 16*10 + 5*8 |
| 77 | + %define arg(x) [rsp + stack_size + 8 + 8*x] |
| 78 | + %define func(x) proc_frame x |
| 79 | + |
| 80 | + %macro FUNC_SAVE 0 |
| 81 | + sub rsp, stack_size |
| 82 | + vmovdqa [rsp + 0*16], xmm6 |
| 83 | + vmovdqa [rsp + 1*16], xmm7 |
| 84 | + vmovdqa [rsp + 2*16], xmm8 |
| 85 | + vmovdqa [rsp + 3*16], xmm9 |
| 86 | + vmovdqa [rsp + 4*16], xmm10 |
| 87 | + vmovdqa [rsp + 5*16], xmm11 |
| 88 | + vmovdqa [rsp + 6*16], xmm12 |
| 89 | + vmovdqa [rsp + 7*16], xmm13 |
| 90 | + vmovdqa [rsp + 8*16], xmm14 |
| 91 | + vmovdqa [rsp + 9*16], xmm15 |
| 92 | + mov [rsp + 10*16 + 0*8], r12 |
| 93 | + mov [rsp + 10*16 + 1*8], r13 |
| 94 | + mov [rsp + 10*16 + 2*8], r14 |
| 95 | + mov [rsp + 10*16 + 3*8], r15 |
| 96 | + end_prolog |
| 97 | + mov arg4, arg(4) |
| 98 | + mov arg5, arg(5) |
| 99 | + %endmacro |
| 100 | + |
| 101 | + %macro FUNC_RESTORE 0 |
| 102 | + vmovdqa xmm6, [rsp + 0*16] |
| 103 | + vmovdqa xmm7, [rsp + 1*16] |
| 104 | + vmovdqa xmm8, [rsp + 2*16] |
| 105 | + vmovdqa xmm9, [rsp + 3*16] |
| 106 | + vmovdqa xmm10, [rsp + 4*16] |
| 107 | + vmovdqa xmm11, [rsp + 5*16] |
| 108 | + vmovdqa xmm12, [rsp + 6*16] |
| 109 | + vmovdqa xmm13, [rsp + 7*16] |
| 110 | + vmovdqa xmm14, [rsp + 8*16] |
| 111 | + vmovdqa xmm15, [rsp + 9*16] |
| 112 | + mov r12, [rsp + 10*16 + 0*8] |
| 113 | + mov r13, [rsp + 10*16 + 1*8] |
| 114 | + mov r14, [rsp + 10*16 + 2*8] |
| 115 | + mov r15, [rsp + 10*16 + 3*8] |
| 116 | + add rsp, stack_size |
| 117 | + %endmacro |
| 118 | +%endif |
| 119 | + |
| 120 | +%define len arg0 |
| 121 | +%define vec arg1 |
| 122 | +%define vec_i arg2 |
| 123 | +%define mul_array arg3 |
| 124 | +%define src arg4 |
| 125 | +%define dest1 arg5 |
| 126 | +%define pos rax |
| 127 | +%define dest2 mul_array |
| 128 | +%define dest3 vec_i |
| 129 | +%define dest4 tmp3 |
| 130 | +%define dest5 tmp4 |
| 131 | + |
| 132 | +%ifndef EC_ALIGNED_ADDR |
| 133 | +;;; Use Un-aligned load/store |
| 134 | + %define XLDR vmovdqu |
| 135 | + %define XSTR vmovdqu |
| 136 | +%else |
| 137 | +;;; Use Non-temporal load/stor |
| 138 | + %ifdef NO_NT_LDST |
| 139 | + %define XLDR vmovdqa |
| 140 | + %define XSTR vmovdqa |
| 141 | + %else |
| 142 | + %define XLDR vmovntdqa |
| 143 | + %define XSTR vmovntdq |
| 144 | + %endif |
| 145 | +%endif |
| 146 | + |
| 147 | +default rel |
| 148 | +[bits 64] |
| 149 | +section .text |
| 150 | + |
| 151 | +%define x0 ymm0 |
| 152 | +%define xd1 ymm1 |
| 153 | +%define xd2 ymm2 |
| 154 | +%define xd3 ymm3 |
| 155 | +%define xd4 ymm4 |
| 156 | +%define xd5 ymm5 |
| 157 | +%define xgft1 ymm6 |
| 158 | +%define xgft2 ymm7 |
| 159 | +%define xgft3 ymm8 |
| 160 | +%define xgft4 ymm9 |
| 161 | +%define xgft5 ymm10 |
| 162 | +%define xret1 ymm11 |
| 163 | +%define xret2 ymm12 |
| 164 | +%define xret3 ymm13 |
| 165 | +%define xret4 ymm14 |
| 166 | +%define xret5 ymm15 |
| 167 | + |
| 168 | +;; |
| 169 | +;; Encodes 32 bytes of a single source into 5x 32 bytes (parity disks) |
| 170 | +;; |
| 171 | +%macro ENCODE_32B_5 0 |
| 172 | + ;; get next source vector |
| 173 | + XLDR x0, [src + pos] |
| 174 | + ;; get next dest vectors |
| 175 | + XLDR xd1, [dest1 + pos] |
| 176 | + XLDR xd2, [dest2 + pos] |
| 177 | + XLDR xd3, [dest3 + pos] |
| 178 | + XLDR xd4, [dest4 + pos] |
| 179 | + XLDR xd5, [dest5 + pos] |
| 180 | + |
| 181 | + GF_MUL_XOR VEX, x0, xgft1, xret1, xd1, xgft2, xret2, xd2, \ |
| 182 | + xgft3, xret3, xd3, xgft4, xret4, xd4, xgft5, xret5, xd5 |
| 183 | + |
| 184 | + XSTR [dest1 + pos], xd1 |
| 185 | + XSTR [dest2 + pos], xd2 |
| 186 | + XSTR [dest3 + pos], xd3 |
| 187 | + XSTR [dest4 + pos], xd4 |
| 188 | + XSTR [dest5 + pos], xd5 |
| 189 | +%endmacro |
| 190 | + |
| 191 | +;; |
| 192 | +;; Encodes less than 32 bytes of a single source into 5x parity disks |
| 193 | +;; |
| 194 | +%macro ENCODE_LT_32B_5 1 |
| 195 | +%define %%LEN %1 |
| 196 | + ;; get next source vector |
| 197 | + simd_load_avx2 x0, src + pos, %%LEN, tmp, tmp2 |
| 198 | + ;; get next dest vectors |
| 199 | + simd_load_avx2 xd1, dest1 + pos, %%LEN, tmp, tmp2 |
| 200 | + simd_load_avx2 xd2, dest2 + pos, %%LEN, tmp, tmp2 |
| 201 | + simd_load_avx2 xd3, dest3 + pos, %%LEN, tmp, tmp2 |
| 202 | + simd_load_avx2 xd4, dest4 + pos, %%LEN, tmp, tmp2 |
| 203 | + simd_load_avx2 xd5, dest5 + pos, %%LEN, tmp, tmp2 |
| 204 | + |
| 205 | + GF_MUL_XOR VEX, x0, xgft1, xret1, xd1, xgft2, xret2, xd2, \ |
| 206 | + xgft3, xret3, xd3, xgft4, xret4, xd4, xgft5, xret5, xd5 |
| 207 | + |
| 208 | + lea dest1, [dest1 + pos] |
| 209 | + simd_store_avx2 dest1, xd1, %%LEN, tmp, tmp2 |
| 210 | + lea dest2, [dest2 + pos] |
| 211 | + simd_store_avx2 dest2, xd2, %%LEN, tmp, tmp2 |
| 212 | + lea dest3, [dest3 + pos] |
| 213 | + simd_store_avx2 dest3, xd3, %%LEN, tmp, tmp2 |
| 214 | + lea dest4, [dest4 + pos] |
| 215 | + simd_store_avx2 dest4, xd4, %%LEN, tmp, tmp2 |
| 216 | + lea dest5, [dest5 + pos] |
| 217 | + simd_store_avx2 dest5, xd5, %%LEN, tmp, tmp2 |
| 218 | +%endmacro |
| 219 | + |
| 220 | +align 16 |
| 221 | +mk_global gf_5vect_mad_avx2_gfni, function |
| 222 | +func(gf_5vect_mad_avx2_gfni) |
| 223 | + FUNC_SAVE |
| 224 | + |
| 225 | + xor pos, pos |
| 226 | + shl vec_i, 3 ;Multiply by 8 |
| 227 | + shl vec, 3 ;Multiply by 8 |
| 228 | + lea tmp, [mul_array + vec_i] |
| 229 | + lea tmp2, [vec*3] |
| 230 | + vbroadcastsd xgft1, [tmp] |
| 231 | + vbroadcastsd xgft2, [tmp + vec] |
| 232 | + vbroadcastsd xgft3, [tmp + vec*2] |
| 233 | + vbroadcastsd xgft4, [tmp + tmp2] |
| 234 | + vbroadcastsd xgft5, [tmp + vec*4] |
| 235 | + mov dest2, [dest1 + 1*8] ; reuse mul_array |
| 236 | + mov dest3, [dest1 + 2*8] ; reuse vec_i |
| 237 | + mov dest4, [dest1 + 3*8] |
| 238 | + mov dest5, [dest1 + 4*8] |
| 239 | + mov dest1, [dest1] |
| 240 | + |
| 241 | + cmp len, 32 |
| 242 | + jb .len_lt_32 |
| 243 | + |
| 244 | +.loop32: |
| 245 | + ENCODE_32B_5 ;; loop on 32 bytes at a time |
| 246 | + |
| 247 | + add pos, 32 |
| 248 | + sub len, 32 |
| 249 | + cmp len, 32 |
| 250 | + jge .loop32 |
| 251 | + |
| 252 | +.len_lt_32: |
| 253 | + cmp len, 0 |
| 254 | + jle .exit |
| 255 | + |
| 256 | + ENCODE_LT_32B_5 len ;; encode final bytes |
| 257 | + |
| 258 | +.exit: |
| 259 | + vzeroupper |
| 260 | + |
| 261 | + FUNC_RESTORE |
| 262 | + ret |
| 263 | + |
| 264 | +endproc_frame |
| 265 | +%endif ; if AS_FEATURE_LEVEL >= 10 |
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