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[SYCL] Re-enable tests on PVC #15555

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Merged
merged 1 commit into from
Oct 1, 2024
Merged

[SYCL] Re-enable tests on PVC #15555

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6 changes: 2 additions & 4 deletions sycl/test-e2e/DeviceCodeSplit/grf.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14,18 +14,16 @@
// compiler option

// REQUIRES: arch-intel_gpu_pvc
// https://github.com/intel/llvm/issues/14826
// XFAIL: *

// RUN: %{build} -o %t.out
// RUN: %{build} -Wno-error=deprecated-declarations -o %t.out
// Don't use SYCL_UR_TRACE as the output from the L0 adapter logging interferes
// with the regular UR traces we are checking.
// RUN: env UR_LOG_TRACING="level:info;output:stdout;flush:info" UR_ENABLE_LAYERS=UR_LAYER_TRACING %{run} %t.out 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-NO-VAR
// RUN: env SYCL_PROGRAM_COMPILE_OPTIONS="-g" UR_LOG_TRACING="level:info;output:stdout;flush:info" UR_ENABLE_LAYERS=UR_LAYER_TRACING %{run} %t.out 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-WITH-VAR
// RUN: %{build} -DUSE_NEW_API=1 -o %t.out
// RUN: env UR_LOG_TRACING="level:info;output:stdout;flush:info" UR_ENABLE_LAYERS=UR_LAYER_TRACING %{run} %t.out 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-NO-VAR
// RUN: env SYCL_PROGRAM_COMPILE_OPTIONS="-g" UR_LOG_TRACING="level:info;output:stdout;flush:info" UR_ENABLE_LAYERS=UR_LAYER_TRACING %{run} %t.out 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-WITH-VAR
// RUN: %{build} -DUSE_AUTO_GRF=1 -o %t.out
// RUN: %{build} -DUSE_AUTO_GRF=1 -Wno-error=deprecated-declarations -o %t.out
// RUN: env UR_LOG_TRACING="level:info;output:stdout;flush:info" UR_ENABLE_LAYERS=UR_LAYER_TRACING %{run} %t.out 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-AUTO-NO-VAR
// RUN: env SYCL_PROGRAM_COMPILE_OPTIONS="-g" UR_LOG_TRACING="level:info;output:stdout;flush:info" UR_ENABLE_LAYERS=UR_LAYER_TRACING %{run} %t.out 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-AUTO-WITH-VAR
// RUN: %{build} -DUSE_NEW_API=1 -DUSE_AUTO_GRF=1 -o %t.out
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5 changes: 1 addition & 4 deletions sycl/test-e2e/KernelAndProgram/target_register_alloc_mode.cpp
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Original file line number Diff line number Diff line change
@@ -1,8 +1,5 @@
// REQUIRES: arch-intel_gpu_pvc

// https://github.com/intel/llvm/issues/14826
// XFAIL: arch-intel_gpu_pvc

// RUN: %{build} -ftarget-register-alloc-mode=pvc:auto -o %t_with.out
// RUN: %{build} -o %t_without.out
// RUN: %{build} -ftarget-register-alloc-mode=pvc:default -o %t_default.out
Expand All @@ -11,7 +8,7 @@
// RUN: env SYCL_UR_TRACE=2 %{run} %t_without.out 2>&1 | FileCheck %if system-windows %{ --implicit-check-not=-ze-intel-enable-auto-large-GRF-mode %} %else %{ --check-prefix=CHECK-OPT %} %s
// RUN: env SYCL_UR_TRACE=2 %{run} %t_default.out 2>&1 | FileCheck --implicit-check-not=-ze-intel-enable-auto-large-GRF-mode %s

// CHECK-OPT: ---> urProgramBuild(
// CHECK-OPT: ---> urProgramBuildExp(
// CHECK-SAME-OPT: -ze-intel-enable-auto-large-GRF-mode

#include <sycl/detail/core.hpp>
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