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[SYCL][SPIR-V][New offload model] Update SPIR-V extension list for new offloading model and add new SPIR-V extension test #15748

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Merged
merged 5 commits into from
Oct 18, 2024
Merged

[SYCL][SPIR-V][New offload model] Update SPIR-V extension list for new offloading model and add new SPIR-V extension test #15748

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3377fda
[SYCL][SPIR-V][New offload model] Add new SPIR-V extension test for n…
asudarsa Oct 17, 2024
dbc4829
Update test based on review comments
asudarsa Oct 17, 2024
f9fc3be
Make the test run on windows as well
asudarsa Oct 17, 2024
071c62d
Remove unneeded options
asudarsa Oct 17, 2024
4bdc46e
Remove redundant test
asudarsa Oct 18, 2024
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103 changes: 103 additions & 0 deletions clang/test/Driver/sycl-spirv-ext.c
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Original file line number Diff line number Diff line change
@@ -0,0 +1,103 @@
// Generate .o file as SYCL device library file.
//
// RUN: touch %t.devicelib.cpp
// RUN: %clang %t.devicelib.cpp -fsycl -fsycl-targets=spir64-unknown-unknown -c --offload-new-driver -o %t_1.devicelib.o
// RUN: %clang %t.devicelib.cpp -fsycl -fsycl-targets=spir64_gen-unknown-unknown -c --offload-new-driver -o %t_2.devicelib.o
// RUN: %clang %t.devicelib.cpp -fsycl -fsycl-targets=spir64_x86_64-unknown-unknown -c --offload-new-driver -o %t_3.devicelib.o

/// Check llvm-spirv extensions that are set
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@sarnex sarnex Oct 17, 2024

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maybe add a space so this comment stands out?


// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl --offload-new-driver \
// RUN: -fsycl-targets=spir64-unknown-unknown -c %s -o %t_1.o
// RUN: clang-linker-wrapper -sycl-device-libraries=%t_1.devicelib.o \
// RUN: "--host-triple=x86_64-unknown-linux-gnu" "--linker-path=/usr/bin/ld" \
// RUN: "--" "-o" "a.out" %t_1.o --dry-run 2>&1 \
// RUN: | FileCheck -check-prefix=CHECK-DEFAULT %s
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl --offload-new-driver \
// RUN: -fsycl-targets=spir64_gen-unknown-unknown -c %s -o %t_2.o
// RUN: clang-linker-wrapper -sycl-device-libraries=%t_2.devicelib.o \
// RUN: "--host-triple=x86_64-unknown-linux-gnu" "--linker-path=/usr/bin/ld" \
// RUN: "--" "-o" "a.out" %t_2.o --dry-run 2>&1 \
// RUN: | FileCheck -check-prefix=CHECK-DEFAULT %s
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl --offload-new-driver \
// RUN: -fsycl-targets=spir64_x86_64-unknown-unknown -c %s -o %t_3.o
// RUN: clang-linker-wrapper -sycl-device-libraries=%t_3.devicelib.o \
// RUN: "--host-triple=x86_64-unknown-linux-gnu" "--linker-path=/usr/bin/ld" \
// RUN: "--" "-o" "a.out" %t_3.o --dry-run 2>&1 \
// RUN: | FileCheck -check-prefix=CHECK-CPU %s

// CHECK-DEFAULT: llvm-spirv{{.*}}-spirv-ext=-all
// CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float_add
// CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float_min_max
// CHECK-DEFAULT-SAME:,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls
// CHECK-DEFAULT-SAME:,+SPV_KHR_expect_assume,+SPV_KHR_linkonce_odr
// CHECK-DEFAULT-SAME:,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io
// CHECK-DEFAULT-SAME:,+SPV_INTEL_device_side_avc_motion_estimation
// CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_loop_controls
// CHECK-DEFAULT-SAME:,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg
// CHECK-DEFAULT-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
// CHECK-DEFAULT-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
// CHECK-DEFAULT-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
// CHECK-DEFAULT-SAME:,+SPV_INTEL_float_controls2
// CHECK-DEFAULT-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
// CHECK-DEFAULT-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
// CHECK-DEFAULT-SAME:,+SPV_INTEL_arbitrary_precision_floating_point
// CHECK-DEFAULT-SAME:,+SPV_INTEL_variable_length_array,+SPV_INTEL_fp_fast_math_mode
// CHECK-DEFAULT-SAME:,+SPV_INTEL_long_constant_composite
// CHECK-DEFAULT-SAME:,+SPV_INTEL_arithmetic_fence
// CHECK-DEFAULT-SAME:,+SPV_INTEL_cache_controls
// CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_buffer_location
// CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_argument_interfaces
// CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_invocation_pipelining_attributes
// CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_latency_control
// CHECK-DEFAULT-SAME:,+SPV_KHR_shader_clock
// CHECK-DEFAULT-SAME:,+SPV_INTEL_bindless_images
// CHECK-DEFAULT-SAME:,+SPV_INTEL_task_sequence
// CHECK-DEFAULT-SAME:,+SPV_INTEL_token_type
// CHECK-DEFAULT-SAME:,+SPV_INTEL_bfloat16_conversion
// CHECK-DEFAULT-SAME:,+SPV_INTEL_joint_matrix
// CHECK-DEFAULT-SAME:,+SPV_INTEL_hw_thread_queries
// CHECK-DEFAULT-SAME:,+SPV_KHR_uniform_group_instructions
// CHECK-DEFAULT-SAME:,+SPV_INTEL_masked_gather_scatter
// CHECK-DEFAULT-SAME:,+SPV_INTEL_tensor_float32_conversion
// CHECK-DEFAULT-SAME:,+SPV_INTEL_optnone
// CHECK-DEFAULT-SAME:,+SPV_KHR_non_semantic_info
// CHECK-DEFAULT-SAME:,+SPV_KHR_cooperative_matrix
// CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float16_add

// CHECK-CPU: llvm-spirv{{.*}}-spirv-ext=-all
// CHECK-CPU-SAME:,+SPV_EXT_shader_atomic_float_add
// CHECK-CPU-SAME:,+SPV_EXT_shader_atomic_float_min_max
// CHECK-CPU-SAME:,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls
// CHECK-CPU-SAME:,+SPV_KHR_expect_assume,+SPV_KHR_linkonce_odr
// CHECK-CPU-SAME:,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io
// CHECK-CPU-SAME:,+SPV_INTEL_device_side_avc_motion_estimation
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_loop_controls
// CHECK-CPU-SAME:,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg
// CHECK-CPU-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
// CHECK-CPU-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
// CHECK-CPU-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
// CHECK-CPU-SAME:,+SPV_INTEL_float_controls2
// CHECK-CPU-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
// CHECK-CPU-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
// CHECK-CPU-SAME:,+SPV_INTEL_arbitrary_precision_floating_point
// CHECK-CPU-SAME:,+SPV_INTEL_variable_length_array,+SPV_INTEL_fp_fast_math_mode
// CHECK-CPU-SAME:,+SPV_INTEL_long_constant_composite
// CHECK-CPU-SAME:,+SPV_INTEL_arithmetic_fence
// CHECK-CPU-SAME:,+SPV_INTEL_cache_controls
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_buffer_location
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_argument_interfaces
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_invocation_pipelining_attributes
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_latency_control
// CHECK-CPU-SAME:,+SPV_INTEL_task_sequence
// CHECK-CPU-SAME:,+SPV_INTEL_token_type
// CHECK-CPU-SAME:,+SPV_INTEL_bfloat16_conversion
// CHECK-CPU-SAME:,+SPV_INTEL_joint_matrix
// CHECK-CPU-SAME:,+SPV_INTEL_hw_thread_queries
// CHECK-CPU-SAME:,+SPV_KHR_uniform_group_instructions
// CHECK-CPU-SAME:,+SPV_INTEL_masked_gather_scatter
// CHECK-CPU-SAME:,+SPV_INTEL_tensor_float32_conversion
// CHECK-CPU-SAME:,+SPV_INTEL_optnone
// CHECK-CPU-SAME:,+SPV_KHR_non_semantic_info
// CHECK-CPU-SAME:,+SPV_KHR_cooperative_matrix
// CHECK-CPU-SAME:,+SPV_INTEL_fp_max_error
7 changes: 4 additions & 3 deletions clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
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Expand Up @@ -872,9 +872,9 @@ getTripleBasedSPIRVTransOpts(const ArgList &Args,
",+SPV_INTEL_fpga_argument_interfaces"
",+SPV_INTEL_fpga_invocation_pipelining_attributes"
",+SPV_INTEL_fpga_latency_control"
",+SPV_INTEL_task_sequence"
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@sarnex sarnex Oct 17, 2024

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is this part of the change NFC or does the order matter?

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@asudarsa asudarsa Oct 17, 2024

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Order does seem to matter. Test fails otherwise.

",+SPV_KHR_shader_clock"
",+SPV_INTEL_bindless_images";
",+SPV_INTEL_bindless_images"
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@sarnex sarnex Oct 17, 2024

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reading the change title i thought this was a test only change, maybe we could rename it to update supported extensions used for llvm-spirv or something?

",+SPV_INTEL_task_sequence";
ExtArg = ExtArg + DefaultExtArg + INTELExtArg;
ExtArg += ",+SPV_INTEL_token_type"
",+SPV_INTEL_bfloat16_conversion"
Expand All @@ -885,7 +885,8 @@ getTripleBasedSPIRVTransOpts(const ArgList &Args,
",+SPV_INTEL_tensor_float32_conversion"
",+SPV_INTEL_optnone"
",+SPV_KHR_non_semantic_info"
",+SPV_KHR_cooperative_matrix";
",+SPV_KHR_cooperative_matrix"
",+SPV_EXT_shader_atomic_float16_add";
if (IsCPU)
ExtArg += ",+SPV_INTEL_fp_max_error";
TranslatorArgs.push_back(Args.MakeArgString(ExtArg));
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