Skip to content

[SYCL][E2E] Disable fill_any_size.cpp on FPGA #16590

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 2 commits into from
Closed

[SYCL][E2E] Disable fill_any_size.cpp on FPGA #16590

Changes from 1 commit
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
622549a
[SYCL][E2E] Disable fill_any_size.cpp on FPGA
sarnex Jan 10, 2025
8885b0d
use existing tracker
sarnex Jan 10, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 3 additions & 0 deletions sycl/test-e2e/USM/fill_any_size.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,9 @@
// clang-format off
// UNSUPPORTED: (opencl && cpu)
// UNSUPPORTED-TRACKER: https://github.com/oneapi-src/unified-runtime/issues/2440

// UNSUPPORTED: accelerator
// UNSUPPORTED-TRACKER: https://github.com/intel/llvm/issues/16589
Copy link
Contributor

@aelovikov-intel aelovikov-intel Jan 10, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I think this is just the existing oneapi-src/unified-runtime#2440 above. fpga/cpu share most of the implementation, and the flakyness matches the behavior described there.

Copy link
Contributor Author

@sarnex sarnex Jan 10, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

ok, ill close my issue and use this tracker, thanks

// clang-format on

/**
Expand Down
Loading