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External Release v2025.12.14
This release aligns XED with Intel ISE Revision 060 and adds support for the Nova Lake (NVL) chip configuration. --- ## General Improvements - New instruction metadata export utility (`xed_to_db.py`): Introduced a user-facing utility that exposes XED instruction metadata through a type-safe Python dataclass for direct consumption in Python frameworks, and also supports exporting the same data as structured JSON files. This enables external tools to consume the instruction database either programmatically or via JSON, without parsing internal XED data files, and includes serialization and validation helpers. - Fixed the `xed_decoded_inst_vector_length_bits()` API to consistently return a vector length of 128 bits for SIMD scalar instructions, where EVEX.VL is ignored. - Removed the redundant `ptr` keyword from AMX instruction memory disassembly, since memory width is defined by `LDTILECFG`. - Enhanced the XED examples README with detailed explanations and a standalone build guide. - Improved Python code robustness and general maintainability.
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‎VERSION‎

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v2025.11.23
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v2025.12.14

‎datafiles/4fmaps-512/4fmaps-512-isa.xed.txt‎

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#BEGIN_LEGAL
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#
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#Copyright (c) 2022 Intel Corporation
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#Copyright (c) 2025 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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EXCEPTIONS: AVX512-E2
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REAL_OPCODE: Y
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ATTRIBUTES: DISP8_TUPLE1_4X MXCSR MULTISOURCE4 MEMORY_FAULT_SUPPRESSION MASKOP_EVEX SIMD_SCALAR
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PATTERN: EVV 0x9B VF2 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()
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PATTERN: EVV 0x9B VF2 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_TUPLE1_4X() FIX_ROUND_LEN128()
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OPERANDS: REG0=XMM_R3():rw:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32:MULTISOURCE4 MEM0:r:dq:f32
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IFORM: V4FMADDSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512
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}
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EXCEPTIONS: AVX512-E2
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REAL_OPCODE: Y
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ATTRIBUTES: DISP8_TUPLE1_4X MXCSR MULTISOURCE4 MEMORY_FAULT_SUPPRESSION MASKOP_EVEX SIMD_SCALAR
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PATTERN: EVV 0xAB VF2 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_TUPLE1_4X()
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PATTERN: EVV 0xAB VF2 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_TUPLE1_4X() FIX_ROUND_LEN128()
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OPERANDS: REG0=XMM_R3():rw:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32:MULTISOURCE4 MEM0:r:dq:f32
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IFORM: V4FNMADDSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512
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}

‎datafiles/apx-f/cpuid-apx-f-amx.xed.txt‎

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#BEGIN_LEGAL
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#
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#Copyright (c) 2025 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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XED_ISA_SET_APX_F_AMX : apx_f.7.1.edx.21 amx_tiles.7.0.edx.24
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XED_ISA_SET_APX_F_AMX_MOVRS : apx_f.7.1.edx.21 amx_movrs.1e.1.eax.8

datafiles/apx-f/cpuid.xed.txt renamed to datafiles/apx-f/cpuid-apx-f.xed.txt

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XED_ISA_SET_APX_F : apx_f.7.1.edx.21
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XED_ISA_SET_APX_F_ADX : apx_f.7.1.edx.21 adoxadcx.7.0.ebx.19
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XED_ISA_SET_APX_F_AMX : apx_f.7.1.edx.21 amx_tiles.7.0.edx.24
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XED_ISA_SET_APX_F_BMI1 : apx_f.7.1.edx.21 bmi1.7.0.ebx.3
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XED_ISA_SET_APX_F_BMI2 : apx_f.7.1.edx.21 bmi2.7.0.ebx.8
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XED_ISA_SET_APX_F_CET : apx_f.7.1.edx.21 cet.7.0.ecx.7
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XED_ISA_SET_APX_F_USER_MSR : apx_f.7.1.edx.21 user_msr.7.1.edx.15
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XED_ISA_SET_APX_F_MOVRS : apx_f.7.1.edx.21 movrs.7.1.eax.31
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XED_ISA_SET_APX_F_AMX_MOVRS : apx_f.7.1.edx.21 amx_movrs.1e.1.eax.8
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### KOP AVX512 Feature bits
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XED_ISA_SET_APX_F_KOPB : apx_f.7.1.edx.21 avx512dq.7.0.ebx.17
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XED_ISA_SET_APX_F_KOPW : apx_f.7.1.edx.21 avx512f.7.0.ebx.16

‎datafiles/apx-f/files-apx-f-amx.cfg‎

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#BEGIN_LEGAL
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#
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#Copyright (c) 2025 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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# APX instructions promoted from AMX
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dec-instructions: apx-f-amx-isa.xed.txt
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enc-instructions: apx-f-amx-isa.xed.txt
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# EVEX/TMM operand NTs
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dec-patterns: apx-amx-evex-reg-tables.txt
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enc-dec-patterns: apx-amx-evex-reg-tables.txt
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cpuid: cpuid-apx-f-amx.xed.txt

datafiles/apx-f/apx-f-future-ext.cfg renamed to datafiles/apx-f/files-apx-f-future-ext.cfg

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#BEGIN_LEGAL
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#
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#Copyright (c) 2024 Intel Corporation
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#Copyright (c) 2025 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.

datafiles/apx-f/files.cfg renamed to datafiles/apx-f/files-apx-f.cfg

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dec-patterns: apx-evgpr-reg-tables.txt
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enc-dec-patterns: apx-evgpr-reg-tables.txt
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# EVEX/TMM operand NTs
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dec-patterns: apx-amx-evex-reg-tables.txt
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enc-dec-patterns: apx-amx-evex-reg-tables.txt
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##############################################################################
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########### APX PATTERN NTs ############
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dec-patterns: apx-evex-dec.txt
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# APX promoted and new EVEX instructions
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dec-instructions: apx-f-isa.xed.txt
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enc-instructions: apx-f-isa.xed.txt
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# Promoted from AMX
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dec-instructions: apx-f-amx-isa.xed.txt
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enc-instructions: apx-f-amx-isa.xed.txt
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# APX POP/PUSH PPX
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dec-instructions: apx-ppx-isa.xed.txt
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enc-instructions: apx-ppx-isa.xed.txt
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##############################################################################
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########### APX Peripherals ###########
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conversion-table: apx-strings.txt
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state: apx-state-bits.txt
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fields: apx-fields.txt
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registers: apx-regs.txt
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cpuid: cpuid.xed.txt
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cpuid: cpuid-apx-f.xed.txt
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datafiles/gnr/avx10-ver1-cpuid.xed.txt renamed to datafiles/avx10-1/avx10-ver1-cpuid.xed.txt

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‎datafiles/avx10-1/files.cfg‎

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#BEGIN_LEGAL
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#
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#Copyright (c) 2025 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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cpuid: avx10-ver1-cpuid.xed.txt

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