Resolve "Optimize SSSE3, AVX2, AVX512 Implementations of GF(2^8) SIMD Arithmetic" #32
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…instruction level parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
…vel parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
…arallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
…parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
…evel parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
… instruction level parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
…n level parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
…h 12th Gen i7 Signed-off-by: Anjan Roy <[email protected]>
Signed-off-by: Anjan Roy <[email protected]>
…ruction level parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
…GFNI+AVX512VL Signed-off-by: Anjan Roy <[email protected]>
…truction level parallelism (ILP) Signed-off-by: Anjan Roy <[email protected]>
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Signed-off-by: Anjan Roy <[email protected]>
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Closes #30