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drivers: sensor: Add Atmel SAM QDEC (TC) Driver
Tested on Atmel SMART SAM E70 Xplained board Origin: Original Signed-off-by: Piotr Mienkowski <[email protected]>
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‎drivers/sensor/CMakeLists.txt‎

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@@ -63,6 +63,7 @@ add_subdirectory_ifdef(CONFIG_MS5837 ms5837)
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add_subdirectory_ifdef(CONFIG_OPT3001 opt3001)
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add_subdirectory_ifdef(CONFIG_PMS7003 pms7003)
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add_subdirectory_ifdef(CONFIG_QDEC_NRFX qdec_nrfx)
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add_subdirectory_ifdef(CONFIG_QDEC_SAM qdec_sam)
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add_subdirectory_ifdef(CONFIG_TEMP_NRF5 nrf5)
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add_subdirectory_ifdef(CONFIG_SHT3XD sht3xd)
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add_subdirectory_ifdef(CONFIG_SI7006 si7006)

‎drivers/sensor/Kconfig‎

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@@ -168,6 +168,8 @@ source "drivers/sensor/pms7003/Kconfig"
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source "drivers/sensor/qdec_nrfx/Kconfig"
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source "drivers/sensor/qdec_sam/Kconfig"
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source "drivers/sensor/sht3xd/Kconfig"
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source "drivers/sensor/si7006/Kconfig"

‎drivers/sensor/qdec_sam/CMakeLists.txt‎

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# Copyright (c) 2021, Piotr Mienkowski
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#
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# SPDX-License-Identifier: Apache-2.0
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zephyr_library()
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zephyr_library_sources(qdec_sam.c)

‎drivers/sensor/qdec_sam/Kconfig‎

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# Atmel SAM MCU family Quadrature Decoder (TC) driver configuration options
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#
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# Copyright (c) 2021, Piotr Mienkowski
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# SPDX-License-Identifier: Apache-2.0
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#
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config QDEC_SAM
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bool "Atmel SAM QDEC driver"
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depends on SOC_FAMILY_SAM
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default n
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help
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Atmel SAM MCU family Quadrature Decoder (TC) driver.

‎drivers/sensor/qdec_sam/qdec_sam.c‎

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/*
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* Copyright (c) 2021, Piotr Mienkowski
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT atmel_sam_tc
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/** @file
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* @brief Atmel SAM MCU family Quadrature Decoder (QDEC/TC) driver.
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*/
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#include <errno.h>
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#include <sys/__assert.h>
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#include <sys/util.h>
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#include <device.h>
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#include <init.h>
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#include <soc.h>
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#include <drivers/sensor.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(qdec_sam, CONFIG_SENSOR_LOG_LEVEL);
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/* Device constant configuration parameters */
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struct qdec_sam_dev_cfg {
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Tc *regs;
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const struct soc_gpio_pin *pin_list;
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uint8_t pin_list_size;
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uint8_t periph_id[TCCHANNEL_NUMBER];
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};
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/* Device run time data */
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struct qdec_sam_dev_data {
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uint16_t position;
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};
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#define DEV_NAME(dev) ((dev)->name)
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#define DEV_CFG(dev) \
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((const struct qdec_sam_dev_cfg *const)(dev)->config)
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#define DEV_DATA(dev) \
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((struct qdec_sam_dev_data *const)(dev)->data)
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static int qdec_sam_fetch(const struct device *dev, enum sensor_channel chan)
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{
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const struct qdec_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);
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struct qdec_sam_dev_data *const dev_data = DEV_DATA(dev);
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Tc *const tc = dev_cfg->regs;
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TcChannel *tc_ch0 = &tc->TC_CHANNEL[0];
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/* Read position register content */
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dev_data->position = tc_ch0->TC_CV;
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return 0;
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}
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static int qdec_sam_get(const struct device *dev, enum sensor_channel chan,
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struct sensor_value *val)
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{
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struct qdec_sam_dev_data *const dev_data = DEV_DATA(dev);
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if (chan == SENSOR_CHAN_ROTATION) {
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val->val1 = dev_data->position;
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val->val2 = 0;
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} else {
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return -ENOTSUP;
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}
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return 0;
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}
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static void qdec_sam_start(Tc *const tc)
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{
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TcChannel *tc_ch0 = &tc->TC_CHANNEL[0];
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/* Enable Channel 0 Clock and reset counter*/
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tc_ch0->TC_CCR = TC_CCR_CLKEN
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| TC_CCR_SWTRG;
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}
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static void qdec_sam_configure(const struct device *dev)
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{
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const struct qdec_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);
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Tc *const tc = dev_cfg->regs;
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TcChannel *tc_ch0 = &tc->TC_CHANNEL[0];
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/* Clock, Trigger Edge, Trigger and Mode Selection */
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tc_ch0->TC_CMR = TC_CMR_TCCLKS_XC0
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| TC_CMR_ETRGEDG_RISING
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| TC_CMR_ABETRG;
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/* Enable QDEC in Position Mode*/
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tc->TC_BMR = TC_BMR_QDEN
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| TC_BMR_POSEN
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| TC_BMR_EDGPHA
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| TC_BMR_MAXFILT(1);
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qdec_sam_start(tc);
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}
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static int qdec_sam_initialize(const struct device *dev)
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{
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__ASSERT_NO_MSG(dev != NULL);
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const struct qdec_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);
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/* Connect pins to the peripheral */
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soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size);
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for (int i = 0; i < ARRAY_SIZE(dev_cfg->periph_id); i++) {
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/* Enable module's clock */
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soc_pmc_peripheral_enable(dev_cfg->periph_id[i]);
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}
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qdec_sam_configure(dev);
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LOG_INF("Device %s initialized", DEV_NAME(dev));
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return 0;
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}
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static const struct sensor_driver_api qdec_sam_driver_api = {
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.sample_fetch = qdec_sam_fetch,
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.channel_get = qdec_sam_get,
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};
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#define QDEC_SAM_INIT(n) \
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static const struct soc_gpio_pin pins_tc##n[] = ATMEL_SAM_DT_PINS(n); \
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\
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static const struct qdec_sam_dev_cfg qdec##n##_sam_config = { \
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.regs = (Tc *)DT_INST_REG_ADDR(n), \
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.pin_list = pins_tc##n, \
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.pin_list_size = ARRAY_SIZE(pins_tc##n), \
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.periph_id = DT_INST_PROP(n, peripheral_id), \
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}; \
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\
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static struct qdec_sam_dev_data qdec##n##_sam_data; \
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\
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DEVICE_DT_INST_DEFINE(n, qdec_sam_initialize, device_pm_control_nop, \
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&qdec##n##_sam_data, &qdec##n##_sam_config, \
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POST_KERNEL, CONFIG_SENSOR_INIT_PRIORITY, \
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&qdec_sam_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(QDEC_SAM_INIT)

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