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Findng purpose
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Findng purpose

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justin-marian/README.md

About me on short

I’m a Computer Science graduate who stumbled into Artificial Intelligence but never looked back.

What began as an interest quickly escalated into an obsession. I learned that AI is not simply about creating models or extracting metrics; it is about recognizing opportunities that are not immediately apparent and making them work reliably.

Throughout my Master's program, I am currently exploring areas such as knowledge representation and reasoning, computer vision, machine learning, data mining, natural language processing, multi-agent systems, neural networks, self-organizing systems, and software verification.

My page will feature a variety of projects, and I intend for that to continue.

Technical Stack

Artificial Intelligence & Data

Programming Languages

Systems & Development

Web & Backend

Other Tools

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  1. casamonitor casamonitor Public archive

    CasaMonitor: Home condition monitoring & control with: sensors, LEDs, fan, automation, real-time data, and customizable settings.

    C++ 2

  2. bittorent bittorent Public archive

    A simulation of the BitTorrent protocol using MPI for decentralized file sharing. The tracker manages segment locations, while peers download and upload segments.

    C++ 1

  3. gps-tracker gps-tracker Public archive

    QEMU-based GPS tracker for Raspberry Pi 3 with real-time processing, Flask web visualization via Buildroot and a custom Linux kernel configurations.

    Python 1

  4. rest-api-web-client rest-api-web-client Public archive

    Client app for server interaction via sockets and GET/POST/DELETE requests, handling authentication, library access, and book management.

    C++ 1

  5. tcp-udp-server tcp-udp-server Public archive

    Client-server messaging platform using TCP/UDP sockets, publish-subscribe, message forwarding, client subscriptions, and store-and-forward functionality, and multiplexed connections.

    C 1

  6. tiny-risc-v tiny-risc-v Public archive

    Minimalist RISC-V with a five-stage pipeline. It serves as a platform for understanding processor design principles.

    Verilog 1