Merge branch 'zephyrproject-rtos:main' into main

Author: kartben

.gitignore

@@ -95,6 +95,7 @@ BoardYml.txt
 Checkpatch.txt
 ClangFormat.txt
 DevicetreeBindings.txt
+DevicetreeLinting.txt
 GitDiffCheck.txt
 Gitlint.txt
 Identity.txt

.ruff-excludes.toml

@@ -409,7 +409,7 @@ if(CONFIG_COMPILER_FREESTANDING)
   zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:$<TARGET_PROPERTY:compiler,freestanding>>)
 endif()
 
-if (CONFIG_PICOLIBC AND NOT CONFIG_PICOLIBC_IO_FLOAT)
+if(CONFIG_PICOLIBC AND NOT CONFIG_PICOLIBC_IO_FLOAT)
   # @Intent: Set compiler specific flag to disable printf-related optimizations
   zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,no_printf_return_value>>)
 endif()
@@ -1157,7 +1157,7 @@ endif()
 
 get_property(OUTPUT_FORMAT        GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT)
 
-if (CONFIG_CODE_DATA_RELOCATION)
+if(CONFIG_CODE_DATA_RELOCATION)
   set(CODE_RELOCATION_DEP code_relocation_source_lib)
 endif() # CONFIG_CODE_DATA_RELOCATION
 
@@ -2134,7 +2134,7 @@ if(CONFIG_BUILD_OUTPUT_INFO_HEADER)
     )
 endif()
 
-if (CONFIG_LLEXT AND CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID)
+if(CONFIG_LLEXT AND CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID)
   #slidgen must be the first post-build command to be executed
   #on the Zephyr ELF to ensure that all other commands, such as
   #binary file generation, are operating on a preparated ELF.
@@ -2200,7 +2200,7 @@ if(signing_script)
 endif()
 
 # Generate USB-C VIF policies in XML format
-if (CONFIG_BUILD_OUTPUT_VIF)
+if(CONFIG_BUILD_OUTPUT_VIF)
   include(${CMAKE_CURRENT_LIST_DIR}/cmake/vif.cmake)
 endif()
 
@@ -2251,7 +2251,7 @@ if(LOG_DICT_DB_NAME_ARG)
       --build-header ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
   )
 
-  if (NOT CONFIG_LOG_DICTIONARY_DB_TARGET)
+  if(NOT CONFIG_LOG_DICTIONARY_DB_TARGET)
     # If not using a separate target for generating logging dictionary
     # database, add the generation to post build command to make sure
     # the database is actually being generated.

CMakeLists.txt

@@ -762,6 +762,8 @@ Build system:
     - scripts/schemas/soc-schema.yaml
     - scripts/list_shields.py
     - scripts/snippets.py
+  files-exclude:
+    - doc/build/dts/
   labels:
     - "area: Build System"
   tests:
@@ -4306,6 +4308,11 @@ Realtek EC Platforms:
   status: maintained
   maintainers:
     - JasonLin-RealTek
+  collaborators:
+    - elmo9999
+    - benson0715
+    - JhanBoChao-Realtek
+    - Titan-Realtek
   files:
     - boards/realtek/
     - drivers/*/*rts5912*

MAINTAINERS.yml

@@ -1,5 +1,5 @@
 VERSION_MAJOR = 4
-VERSION_MINOR = 2
-PATCHLEVEL = 99
+VERSION_MINOR = 3
+PATCHLEVEL = 0
 VERSION_TWEAK = 0
-EXTRAVERSION =
+EXTRAVERSION = rc1

VERSION

@@ -27,7 +27,7 @@ add_subdirectory_ifdef(CONFIG_ARM_AARCH32_MMU mmu)
 add_subdirectory_ifdef(CONFIG_CPU_AARCH32_CORTEX_R cortex_a_r)
 add_subdirectory_ifdef(CONFIG_CPU_AARCH32_CORTEX_A cortex_a_r)
 
-if (CONFIG_ARM_ZIMAGE_HEADER)
+if(CONFIG_ARM_ZIMAGE_HEADER)
 zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors zimage_header.ld)
 zephyr_linker_sources(ROM_START SORT_KEY 0x1vectors vector_table.ld)
 zephyr_linker_sources(ROM_START SORT_KEY 0x2vectors cortex_m/vector_table_pad.ld)

arch/arm/core/CMakeLists.txt

@@ -49,13 +49,13 @@ if(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
 endif()
 
 if(CONFIG_CORTEX_M_DWT)
-	if (CONFIG_TIMING_FUNCTIONS)
+	if(CONFIG_TIMING_FUNCTIONS)
 		zephyr_library_sources(timing.c)
 	endif()
 endif()
 
-if (CONFIG_SW_VECTOR_RELAY)
-if (CONFIG_CPU_CORTEX_M_HAS_VTOR)
+if(CONFIG_SW_VECTOR_RELAY)
+if(CONFIG_CPU_CORTEX_M_HAS_VTOR)
   set(relay_vector_table_sort_key relay_vectors)
 else()
 # Using 0x0 prefix will result in placing the relay vector table section
@@ -72,14 +72,14 @@ zephyr_linker_sources(
   )
 endif()
 
-if (CONFIG_SW_VECTOR_RELAY OR CONFIG_SW_VECTOR_RELAY_CLIENT)
+if(CONFIG_SW_VECTOR_RELAY OR CONFIG_SW_VECTOR_RELAY_CLIENT)
 zephyr_linker_sources(
   RAM_SECTIONS
   vt_pointer_section.ld
   )
 endif()
 
-if (CONFIG_CPU_CORTEX_M_HAS_VTOR)
+if(CONFIG_CPU_CORTEX_M_HAS_VTOR)
 zephyr_linker_sources_ifdef(CONFIG_SRAM_VECTOR_TABLE
   RAM_SECTIONS
   # Maybe need to be changed in order to be placed at the beginning of RAM

arch/arm/core/cortex_m/CMakeLists.txt

@@ -11,10 +11,10 @@ if(CONFIG_CPU_CORTEX_M AND NOT CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS)
   zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu_regions.c)
 endif()
 
-if (CONFIG_CPU_AARCH32_CORTEX_R)
+if(CONFIG_CPU_AARCH32_CORTEX_R)
 zephyr_library_include_directories(cortex_a_r)
-elseif (CONFIG_CPU_CORTEX_M)
+elseif(CONFIG_CPU_CORTEX_M)
 zephyr_library_include_directories(cortex_m)
-else ()
+else()
 message(FATAL_ERROR "CPU is not Cortex-A/R/M")
-endif ()
+endif()

arch/arm/core/mpu/CMakeLists.txt

@@ -41,9 +41,9 @@ zephyr_library_sources_ifdef(CONFIG_HAS_ARM_SMCCC smccc-call.S)
 zephyr_library_sources_ifdef(CONFIG_AARCH64_IMAGE_HEADER header.S)
 zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
 zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
-if ((CONFIG_MP_MAX_NUM_CPUS GREATER 1) OR (CONFIG_SMP))
+if((CONFIG_MP_MAX_NUM_CPUS GREATER 1) OR (CONFIG_SMP))
   zephyr_library_sources(smp.c)
-endif ()
+endif()
 
 zephyr_cc_option_ifdef(CONFIG_USERSPACE -mno-outline-atomics)
 zephyr_cc_option_ifdef(CONFIG_FRAME_POINTER -mno-omit-leaf-frame-pointer)

arch/arm64/core/CMakeLists.txt

@@ -86,7 +86,7 @@ zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY
   nocache.ld
 )
 
-if (DEFINED CONFIG_ARCH_SUPPORTS_ROM_OFFSET)
+if(DEFINED CONFIG_ARCH_SUPPORTS_ROM_OFFSET)
   # Exclamation mark is printable character with lowest number in ASCII table.
   # We are sure that this file will be included as a first.
   zephyr_linker_sources(ROM_START SORT_KEY ! rom_start_address.ld)
@@ -101,7 +101,7 @@ endif()
 
 # isr_tables is a normal CMake library and not a zephyr_library because it
 # should not be --whole-archive'd
-if (CONFIG_GEN_ISR_TABLES)
+if(CONFIG_GEN_ISR_TABLES)
   add_library(isr_tables
     isr_tables.c
   )