@@ -2610,8 +2610,8 @@ static unsigned long rt5682s_wclk_recalc_rate(struct clk_hw *hw,
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return rt5682s -> lrck [RT5682S_AIF1 ];
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}
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- static long rt5682s_wclk_round_rate (struct clk_hw * hw , unsigned long rate ,
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- unsigned long * parent_rate )
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+ static int rt5682s_wclk_determine_rate (struct clk_hw * hw ,
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+ struct clk_rate_request * req )
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{
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struct rt5682s_priv * rt5682s =
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container_of (hw , struct rt5682s_priv , dai_clks_hw [RT5682S_DAI_WCLK_IDX ]);
@@ -2624,13 +2624,13 @@ static long rt5682s_wclk_round_rate(struct clk_hw *hw, unsigned long rate,
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* Only accept to set wclk rate to 44.1k or 48kHz.
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* It will force to 48kHz if not both.
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*/
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- if (rate != CLK_48 && rate != CLK_44 ) {
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+ if (req -> rate != CLK_48 && req -> rate != CLK_44 ) {
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dev_warn (component -> dev , "%s: clk %s only support %d or %d Hz output\n" ,
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__func__ , clk_name , CLK_44 , CLK_48 );
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- rate = CLK_48 ;
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+ req -> rate = CLK_48 ;
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}
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- return rate ;
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+ return 0 ;
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}
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static int rt5682s_wclk_set_rate (struct clk_hw * hw , unsigned long rate ,
@@ -2719,14 +2719,14 @@ static unsigned long rt5682s_bclk_get_factor(unsigned long rate,
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return 256 ;
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}
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- static long rt5682s_bclk_round_rate (struct clk_hw * hw , unsigned long rate ,
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- unsigned long * parent_rate )
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+ static int rt5682s_bclk_determine_rate (struct clk_hw * hw ,
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+ struct clk_rate_request * req )
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{
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struct rt5682s_priv * rt5682s =
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container_of (hw , struct rt5682s_priv , dai_clks_hw [RT5682S_DAI_BCLK_IDX ]);
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unsigned long factor ;
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- if (!* parent_rate || !rt5682s_clk_check (rt5682s ))
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+ if (!req -> best_parent_rate || !rt5682s_clk_check (rt5682s ))
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return - EINVAL ;
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/*
@@ -2736,9 +2736,11 @@ static long rt5682s_bclk_round_rate(struct clk_hw *hw, unsigned long rate,
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* and find the appropriate multiplier of BCLK to
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* get the rounded down BCLK value.
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*/
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- factor = rt5682s_bclk_get_factor (rate , * parent_rate );
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+ factor = rt5682s_bclk_get_factor (req -> rate , req -> best_parent_rate );
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+
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+ req -> rate = req -> best_parent_rate * factor ;
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- return * parent_rate * factor ;
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+ return 0 ;
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}
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static int rt5682s_bclk_set_rate (struct clk_hw * hw , unsigned long rate ,
@@ -2769,12 +2771,12 @@ static const struct clk_ops rt5682s_dai_clk_ops[RT5682S_DAI_NUM_CLKS] = {
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.prepare = rt5682s_wclk_prepare ,
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.unprepare = rt5682s_wclk_unprepare ,
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.recalc_rate = rt5682s_wclk_recalc_rate ,
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- .round_rate = rt5682s_wclk_round_rate ,
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+ .determine_rate = rt5682s_wclk_determine_rate ,
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.set_rate = rt5682s_wclk_set_rate ,
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},
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[RT5682S_DAI_BCLK_IDX ] = {
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.recalc_rate = rt5682s_bclk_recalc_rate ,
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- .round_rate = rt5682s_bclk_round_rate ,
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+ .determine_rate = rt5682s_bclk_determine_rate ,
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.set_rate = rt5682s_bclk_set_rate ,
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},
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};
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