Skip to content

Commit 8b61c89

Browse files
Fabrizio Castrobroonie
authored andcommitted
spi: Add driver for the RZ/V2H(P) RSPI IP
The Renesas RZ/V2H(P) RSPI IP supports 4-wire and 3-wire serial communications in both host role and target role. It can use a DMA, but the I/O can also be driven by the processor. RX-only, TX-only, and RX-TX operations are available in DMA mode, while in processor I/O mode it only RX-TX operations are supported. Add a driver to support 4-wire serial communications as host role in processor I/O mode. Signed-off-by: Fabrizio Castro <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
1 parent 44b91d6 commit 8b61c89

File tree

3 files changed

+475
-0
lines changed

3 files changed

+475
-0
lines changed

drivers/spi/Kconfig

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -923,6 +923,14 @@ config SPI_RSPI
923923
help
924924
SPI driver for Renesas RSPI and QSPI blocks.
925925

926+
config SPI_RZV2H_RSPI
927+
tristate "Renesas RZ/V2H RSPI controller"
928+
depends on ARCH_RENESAS || COMPILE_TEST
929+
help
930+
RSPI driver for the Renesas RZ/V2H Serial Peripheral Interface (RSPI).
931+
RSPI supports both SPI host and SPI target roles. This option only
932+
enables the SPI host role.
933+
926934
config SPI_RZV2M_CSI
927935
tristate "Renesas RZ/V2M CSI controller"
928936
depends on ARCH_RENESAS || COMPILE_TEST

drivers/spi/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -126,6 +126,7 @@ obj-$(CONFIG_MACH_REALTEK_RTL) += spi-realtek-rtl.o
126126
obj-$(CONFIG_SPI_REALTEK_SNAND) += spi-realtek-rtl-snand.o
127127
obj-$(CONFIG_SPI_RPCIF) += spi-rpc-if.o
128128
obj-$(CONFIG_SPI_RSPI) += spi-rspi.o
129+
obj-$(CONFIG_SPI_RZV2H_RSPI) += spi-rzv2h-rspi.o
129130
obj-$(CONFIG_SPI_RZV2M_CSI) += spi-rzv2m-csi.o
130131
obj-$(CONFIG_SPI_S3C64XX) += spi-s3c64xx.o
131132
obj-$(CONFIG_SPI_SC18IS602) += spi-sc18is602.o

0 commit comments

Comments
 (0)