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[TODO: Finish FSM definition] added controller FSM
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src/controlUnit.v

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@@ -21,6 +21,30 @@ wire datar_rdy;
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// Counter for number of read features
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reg [2:0] read_feature_cnt;
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// ============ control Unit FSM ============
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parameter FSM_SIZE = 2;
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parameter INIT = 2'b01, READ = 2'b10;
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reg [FSM_SIZE-1:0] curr_state;
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reg [FSM_SIZE-1:0] next_state;
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always @(state, line_cnt, read_feature_cnt)
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begin
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next_state = 2'b00;
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case (curr_state)
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IDLE: begin
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if (line_cnt >= 21)
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begin
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datar_rdy = 1'b1;
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next_state = READ;
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end
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end
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READ: begin
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end
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endcase
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end
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// ============ end control Unit FSM ============
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// ============ write controller ============
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always @(posedge clk)
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begin

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