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1 parent 9373b3a commit 7dea61eCopy full SHA for 7dea61e
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -39,8 +39,8 @@ def riscv_tuple_insert : RVSDNode<"TUPLE_INSERT",
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SDTCisVT<3, i32>]>>;
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def riscv_tuple_extract : RVSDNode<"TUPLE_EXTRACT",
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- SDTypeProfile<1, 2, [SDTCisVec<0>,
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- SDTCisVT<2, i32>]>>;
+ SDTypeProfile<1, 2, [SDTCisVec<0>,
+ SDTCisVT<2, i32>]>>;
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//===----------------------------------------------------------------------===//
@@ -461,11 +461,11 @@ let HasMaskOp = true in {
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SDTCisVT<3, XLenVT>]>>;
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def riscv_vfirst_vl : RVSDNode<"VFIRST_VL",
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- SDTypeProfile<1, 3, [SDTCisVT<0, XLenVT>,
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- SDTCisVec<1>, SDTCisInt<1>,
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- SDTCVecEltisVT<2, i1>,
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- SDTCisSameNumEltsAs<1, 2>,
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- SDTCisVT<3, XLenVT>]>>;
+ SDTypeProfile<1, 3, [SDTCisVT<0, XLenVT>,
+ SDTCisVec<1>, SDTCisInt<1>,
+ SDTCVecEltisVT<2, i1>,
+ SDTCisSameNumEltsAs<1, 2>,
+ SDTCisVT<3, XLenVT>]>>;
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} // let HasMaskOp = true
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def SDT_RISCVVEXTEND_VL : SDTypeProfile<1, 3, [SDTCisVec<0>,
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