clang-format

Author: lenary

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

@@ -11,12 +11,12 @@
 //===----------------------------------------------------------------------===//
 
 #include "RISCVISelDAGToDAG.h"
-#include "RISCVSelectionDAGInfo.h"
 #include "MCTargetDesc/RISCVBaseInfo.h"
 #include "MCTargetDesc/RISCVMCTargetDesc.h"
 #include "MCTargetDesc/RISCVMatInt.h"
 #include "RISCVISelLowering.h"
 #include "RISCVInstrInfo.h"
+#include "RISCVSelectionDAGInfo.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/IR/IntrinsicsRISCV.h"
 #include "llvm/Support/Alignment.h"

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -6965,8 +6965,6 @@ static unsigned getRISCVVLOp(SDValue Op) {
 #undef VP_CASE
 }
 
-
-
 static bool isPromotedOpNeedingSplit(SDValue Op,
                                      const RISCVSubtarget &Subtarget) {
   if (Op.getValueType() == MVT::nxv32f16 &&
@@ -12565,7 +12563,7 @@ SDValue RISCVTargetLowering::lowerFixedLengthVectorSelectToRVV(
 SDValue RISCVTargetLowering::lowerToScalableOp(SDValue Op,
                                                SelectionDAG &DAG) const {
   const auto &TSInfo =
-       static_cast<const RISCVSelectionDAGInfo &>(DAG.getSelectionDAGInfo());
+      static_cast<const RISCVSelectionDAGInfo &>(DAG.getSelectionDAGInfo());
 
   unsigned NewOpc = getRISCVVLOp(Op);
   bool HasPassthruOp = TSInfo.hasPassthruOp(NewOpc);
@@ -12621,7 +12619,7 @@ SDValue RISCVTargetLowering::lowerToScalableOp(SDValue Op,
 //   types.
 SDValue RISCVTargetLowering::lowerVPOp(SDValue Op, SelectionDAG &DAG) const {
   const auto &TSInfo =
-       static_cast<const RISCVSelectionDAGInfo &>(DAG.getSelectionDAGInfo());
+      static_cast<const RISCVSelectionDAGInfo &>(DAG.getSelectionDAGInfo());
 
   unsigned RISCVISDOpc = getRISCVVLOp(Op);
   bool HasPassthruOp = TSInfo.hasPassthruOp(RISCVISDOpc);
@@ -18376,7 +18374,7 @@ static SDValue combineToVWMACC(SDNode *N, SelectionDAG &DAG,
     return SDValue();
 
   const auto &TSInfo =
-       static_cast<const RISCVSelectionDAGInfo &>(DAG.getSelectionDAGInfo());
+      static_cast<const RISCVSelectionDAGInfo &>(DAG.getSelectionDAGInfo());
   unsigned Opc = TSInfo.getMAccOpcode(MulOp.getOpcode());
 
   SDLoc DL(N);

llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp

@@ -13,11 +13,13 @@
 
 using namespace llvm;
 
-RISCVSelectionDAGInfo::RISCVSelectionDAGInfo() : SelectionDAGGenTargetInfo(RISCVGenSDNodeInfo) {}
+RISCVSelectionDAGInfo::RISCVSelectionDAGInfo()
+    : SelectionDAGGenTargetInfo(RISCVGenSDNodeInfo) {}
 
 RISCVSelectionDAGInfo::~RISCVSelectionDAGInfo() = default;
 
-void RISCVSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG, const SDNode *N) const {
+void RISCVSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
+                                             const SDNode *N) const {
   switch (N->getOpcode()) {
   case RISCVISD::PROBED_ALLOCA:
     // FIXME: Current examples do not match the SDTypeProfile.

llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.h

@@ -30,7 +30,8 @@ class RISCVSelectionDAGInfo : public SelectionDAGGenTargetInfo {
 
   ~RISCVSelectionDAGInfo() override;
 
-  void verifyTargetNode(const SelectionDAG &DAG, const SDNode *N) const override;
+  void verifyTargetNode(const SelectionDAG &DAG,
+                        const SDNode *N) const override;
 
   bool hasPassthruOp(unsigned Opcode) const {
     return GenNodeInfo.getDesc(Opcode).TSFlags & RISCVISD::HasPassthruOpMask;