Add bankswitching support

libretro/libretro.c

@@ -100,6 +100,9 @@ bool retro_unserialize(const void *data, size_t size)
 	return vecx_deserialize((char*)data, size);
 }
 
+unsigned b;
+unsigned char cart[65536];
+
 bool retro_load_game(const struct retro_game_info *info)
 {
    size_t cart_sz;
@@ -135,6 +138,10 @@ bool retro_load_game(const struct retro_game_info *info)
    {
       memset(cart, 0, cart_sz);
       memcpy(cart, info->data, info->size);
+      for(b = 0; b < sizeof(cart); b++)
+      {
+	   set_cart(b, cart[b]);
+      }
 
       vecx_reset();
       e8910_init_sound();
@@ -148,6 +155,10 @@ bool retro_load_game(const struct retro_game_info *info)
 void retro_unload_game(void)
 {
 	memset(cart, 0, sizeof(cart) / sizeof(cart[0]));
+	for(b = 0; b < sizeof(cart); b++)
+	{
+	   set_cart(b, 0);
+	}
 	vecx_reset();
 }
 

osint.c

@@ -41,6 +41,10 @@ void osint_render(void){
 static char *romfilename = "rom.dat";
 static char *cartfilename = NULL;
 
+
+unsigned b;
+unsigned char cart[65536];
+
 static void init(){
 	FILE *f;
 	if(!(f = fopen(romfilename, "rb"))){
@@ -63,6 +67,10 @@ static void init(){
 		fread(cart, 1, sizeof (cart), f);
 		fclose(f);
 	}
+
+	for(b = 0; b<sizeof(cart); b++) {
+		set_cart(b, cart[b]);
+	}
 }
 
 void resize(int width, int height){

vecx.c

@@ -12,9 +12,24 @@
 #define einline __inline
 
 unsigned char rom[8192];
-unsigned char cart[32768];
+unsigned char cart[65536];
 static unsigned char ram[1024];
 
+unsigned newbankswitchOffset = 0;
+unsigned bankswitchOffset = 0;
+unsigned char get_cart(unsigned pos) { return cart[(pos+bankswitchOffset)%65536]; }
+void set_cart(unsigned pos, unsigned char data){ cart[(pos)%65536] = data; }
+
+#define BS_0 0
+#define BS_1 1
+#define BS_2 2
+#define BS_3 3
+#define BS_4 4
+#define BS_5 5
+
+unsigned bankswitchstate = BS_0;
+
+
 /* the via 6522 registers */
 
 static unsigned via_ora;
@@ -484,7 +499,7 @@ unsigned char read8 (unsigned address)
 	} else if (address < 0x8000) {
 		/* cartridge */
 
-		data = cart[address];
+		data = get_cart(address);
 	} else {
 		data = 0xff;
 	}
@@ -506,6 +521,12 @@ void write8 (unsigned address, unsigned char data)
 		if (address & 0x1000) {
 			switch (address & 0xf) {
 			case 0x0:
+				if(bankswitchstate == BS_2)
+				{
+					if (data == 1) bankswitchstate = BS_3; else bankswitchstate = BS_0;
+				} else {
+					bankswitchstate = BS_0;
+				}
 				via_orb = data;
 
 				snd_update ();
@@ -524,6 +545,13 @@ void write8 (unsigned address, unsigned char data)
 			case 0x1:
 				/* register 1 also performs handshakes if necessary */
 
+				if(bankswitchstate == BS_3)
+				{
+					if (data == 0) bankswitchstate = BS_4; else bankswitchstate = BS_0;
+				} else {
+					 bankswitchstate = BS_0;
+				}
+
 				if ((via_pcr & 0x0e) == 0x08) {
 					/* if ca2 is in pulse mode or handshake mode, then it
 					 * goes low whenever ora is written.
@@ -550,13 +578,21 @@ void write8 (unsigned address, unsigned char data)
 				break;
 			case 0x2:
 				via_ddrb = data;
+				bankswitchstate = BS_1;
+				if(data & 0x40) newbankswitchOffset = 0; else newbankswitchOffset = 32768;
 				break;
 			case 0x3:
 				via_ddra = data;
+				if(bankswitchstate == BS_1) bankswitchstate = BS_2; else bankswitchstate = BS_0;
 				break;
 			case 0x4:
 				/* T1 low order counter */
 
+				if(bankswitchstate == BS_5)
+				{
+					bankswitchOffset = newbankswitchOffset;
+					bankswitchstate = BS_0;
+				}
 				via_t1ll = data;
 
 				break;
@@ -612,6 +648,12 @@ void write8 (unsigned address, unsigned char data)
 				break;
 			case 0xb:
 				via_acr = data;
+				if(bankswitchstate == BS_4)
+				{
+					if (data == 0x98) bankswitchstate = BS_5; else bankswitchstate = BS_0;
+				} else {
+					bankswitchstate = BS_0;
+				}
 				break;
 			case 0xc:
 				via_pcr = data;

vecx.h

@@ -20,7 +20,8 @@ typedef struct vector_type {
 } vector_t;
 
 extern unsigned char rom[8192];
-extern unsigned char cart[32768];
+extern unsigned char get_cart(unsigned pos);
+extern void set_cart(unsigned pos, unsigned char data);
 
 extern unsigned snd_regs[16];
 extern unsigned alg_jch0;