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Add support for the SPI module on TI’s MSPM0 MCUs. The driver supports master mode transfers with configurable frame size (4–16 bits), clock polarity/phase, bit order.

@santhosh-c-c santhosh-c-c force-pushed the upstream/ti/mspm0-spi branch 2 times, most recently from 59f786c to 6b7114b Compare August 26, 2025 13:12
Add devicetree bindings for the TI MSPM0 SPI module.

Signed-off-by: Santhosh Charles <[email protected]>
Signed-off-by: Jackson Farley <[email protected]>
@santhosh-c-c santhosh-c-c force-pushed the upstream/ti/mspm0-spi branch from 6b7114b to fd737b8 Compare October 10, 2025 05:14
santhosh-c-c and others added 3 commits October 30, 2025 16:02
Add support for the SPI module on TI’s MSPM0 MCUs.
The driver supports master mode transfers with configurable
frame size (4–16 bits), clock polarity/phase, bit order.

Signed-off-by: Santhosh Charles <[email protected]>
Signed-off-by: Jackson Farley <[email protected]>
Co-authored-by: Hans Binderup <[email protected]>
Add SPI nodes in TI MSPM0 family where the spi nodes are present.

Signed-off-by: Santhosh Charles <[email protected]>
Signed-off-by: Jackson Farley <[email protected]>
In flight PR includes the input-enable property for all
SPI POCI pins for mspm0l222x series.

Signed-off-by: Santhosh Charles <[email protected]>
@santhosh-c-c santhosh-c-c force-pushed the upstream/ti/mspm0-spi branch from fd737b8 to f8e1a52 Compare October 30, 2025 10:36
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The following west manifest projects have changed revision in this Pull Request:

Name Old Revision New Revision Diff
hal_ti zephyrproject-rtos/hal_ti@391f7cb zephyrproject-rtos/hal_ti#73 zephyrproject-rtos/hal_ti#73/files

DNM label due to: 1 project with PR revision

Note: This message is automatically posted and updated by the Manifest GitHub Action.

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2 participants