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Update documentation to load Zephyr applications #23

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97 changes: 35 additions & 62 deletions README.md
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Zephyr-on-litex-vexriscv
========================

Zephyr on LiteX VexRiscv is a LiteX SoC builder for the `litex_vexriscv` platform in Zephyr. Currently it supports [Digilent Arty A7-35T Development Board](https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists) and [SDI MIPI Video Converter](https://github.com/antmicro/sdi-mipi-video-converter).
Zephyr on LiteX VexRiscv is a LiteX SoC builder for the `litex_vexriscv` platform in Zephyr. It should work on any board supported in Litex.

Prerequisites
------------

First, if you want to run Zephyr on Digilent Arty, you have to install the F4PGA toolchain. It can be done by following instructions in [this tutorial](https://f4pga-examples.readthedocs.io/en/latest/getting.html).
For SDI MIPI Video Converter - install oxide (yosys+nextpnr) toolchain by following [these instructions](https://github.com/gatecat/prjoxide#getting-started---complete-flow).
Install Migen/LiteX and the LiteX’s cores:
```bash
wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
chmod +x litex_setup.py
./litex_setup.py --init --install --user (--user to install to user directory) --config=(minimal, standard, full)```
```

Then, clone and enter the Zephyr-on-litex-vexriscv repository:
For Digilent Arty board:
------------------------

* Build/Flash the bitstream:
```bash
git clone https://github.com/litex-hub/zephyr-on-litex-vexriscv.git && cd zephyr-on-litex-vexriscv
./litex-boards/litex_boards/targets/digilent_arty.py --build --load --timer-uptime --csr-json csr.json
```

Get all required submodules and packages, and run the install script:
* Generate the dts and config overlay:
```bash
git submodule update --init --recursive
apt-get install build-essential bzip2 python3 python3-dev python3-pip
./install.sh
./litex/litex/tools/litex_json2dts_zephyr.py --dts overlay.dts --config overlay.config csr.json
```

Build
-----
Build the bitstream by following these steps:

* Add LiteX to path:
* Build Zephyr Application:
```bash
source ./init
west build -b litex_vexriscv <Path-Zephyr-SDK>/samples/<app> -DDTC_OVERLAY_FILE=/<path>/overlay.dts
```
* Prepare F4PGA environment (for Digilent Arty target):

Resulting binary is `build/zephyr/zephyr.bin`.

* Flash the Application:
```bash
export F4PGA_INSTALL_DIR="path/to/f4pga"
FPGA_FAM="xc7"
export PATH="$F4PGA_INSTALL_DIR/$FPGA_FAM/install/bin:$PATH";
source "$F4PGA_INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh"
conda activate $FPGA_FAM
litex_term /dev/ttyUSB1 --kernel=build/zephyr/zephyr.bin --serialboot
```
* Finally build the bitstream:

For Digilent Arty board:
```bash
./make.py --board=arty --build
```
For SDI MIPI board:
```bash
./make.py --board=sdi_mipi_bridge --build --toolchain=oxide
```
For simulation with litex_sim :
-------------------------------

Build options
-----
| Option | Help |
|---|---|
| --toolchain | FPGA toolchain |
| --board | FPGA board |
| --build | build bitstream |
| --variant | FPGA board variant |
| --load | load bitstream |
| --with-ethernet | Enable ethernet |
| --with_i2s | Enable i2s |
| --sys-clk-freq | System clock frequency |
| --with_spi | Enable SPI |
| --with_spi_flash | Enable SPI flash |
| --with_i2c | Enable I2C (bitbang driver) |
| --with_litei2c | Enable I2C via [LiteI2C](https://github.com/litex-hub/litei2c) |
| --with_pwm | Enable PWM |
| --spi-data-width | SPI data width |
| --spi-clk-freq | SPI clock frequency |
| --spi_flash_rate | SPI flash rate |
| --with_mmcm | Enable MMCM |
| --local-ip | local IP address |
| --remote-ip | remote IP address |
* Build simulation bitstream:
```bash
litex_sim --integrated-main-ram-size=0x10000 --cpu-type=vexriscv --timer-uptime --no-compile-gateware
```

Load bitstream
--------------
Connect your board using the serial port and load the bitstream:
* Generate the dts and config overlay:
```bash
litex/litex/tools/litex_json2dts_zephyr.py --dts overlay_sim.dts --config overlay_sim.config build/sim/csr.json
```

For Digilent Arty board:
* Build Zephyr Application:
```bash
source ./init
./make.py --board=arty --load
west build -b litex_vexriscv <Path-Zephyr-SDK>//samples/hello_world -DDTC_OVERLAY_FILE=/<path>/overlay_sim.dts
```

For SDI MIPI board:
* Simulate the Application:
```bash
source ./init
./make.py --board=sdi_mipi_bridge --load
litex_sim --integrated-main-ram-size=0x10000 --cpu-type=vexriscv --timer-uptime --ram-init=build/zephyr/zephyr.bin
```