[LV] Update tests to avoid loop invariant instructions.

Update some tests with loop invariant instructions so the instructions
cannot be hoisted out.

This preserves the original test intention after
llvm#107894.

Author: fhahn

llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll

@@ -128,6 +128,7 @@ for.cond.cleanup:                                 ; preds = %for.body
 
 ; CHECK-REMARKS: UserVF ignored because of invalid costs.
 ; CHECK-REMARKS-NEXT: t.c:3:10: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): load
+; CHECK-REMARKS-NEXT: t.c:3:30: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): fadd
 ; CHECK-REMARKS-NEXT: t.c:3:30: Recipe with invalid costs prevented vectorization at VF=(vscale x 1, vscale x 2): call to llvm.sin.f32
 ; CHECK-REMARKS-NEXT: t.c:3:20: Recipe with invalid costs prevented vectorization at VF=(vscale x 1, vscale x 2): call to llvm.sin.f32
 ; CHECK-REMARKS-NEXT: t.c:3:40: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): store
@@ -148,7 +149,8 @@ if.then:
   %1 = tail call fast float @llvm.sin.f32(float %0), !dbg !12
   br label %if.end
 if.else:
-  %2 = tail call fast float @llvm.sin.f32(float 0.0), !dbg !13
+  %add = fadd float %0, 12.0, !dbg !13
+  %2 = tail call fast float @llvm.sin.f32(float %add), !dbg !13
   br label %if.end
 if.end:
   %3 = phi float [%1, %if.then], [%2, %if.else]

llvm/test/Transforms/LoopVectorize/is_fpclass.ll

@@ -10,8 +10,11 @@ define void @d() {
 ; CHECK:       vector.body:
 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
 ; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
+; CHECK-NEXT:    [[TMP6:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[TMP6]], i64 0
+; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer
 ; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr float, ptr @d, i64 [[TMP0]]
-; CHECK-NEXT:    [[TMP2:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> zeroinitializer, i32 0)
+; CHECK-NEXT:    [[TMP2:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[BROADCAST_SPLAT]], i32 0)
 ; CHECK-NEXT:    [[TMP3:%.*]] = select <2 x i1> [[TMP2]], <2 x float> zeroinitializer, <2 x float> zeroinitializer
 ; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr float, ptr [[TMP1]], i32 0
 ; CHECK-NEXT:    store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
@@ -27,7 +30,7 @@ define void @d() {
 ; CHECK-NEXT:    [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I7:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[I3:%.*]] = load float, ptr null, align 4
 ; CHECK-NEXT:    [[I4:%.*]] = getelementptr float, ptr @d, i64 [[I]]
-; CHECK-NEXT:    [[I5:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 0.000000e+00, i32 0)
+; CHECK-NEXT:    [[I5:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[I3]], i32 0)
 ; CHECK-NEXT:    [[I6:%.*]] = select i1 [[I5]], float 0.000000e+00, float 0.000000e+00
 ; CHECK-NEXT:    store float [[I6]], ptr [[I4]], align 4
 ; CHECK-NEXT:    [[I7]] = add i64 [[I]], 1
@@ -43,7 +46,7 @@ loop:
   %i = phi i64 [ 0, %entry ], [ %i7, %loop ]
   %i3 = load float, ptr null, align 4
   %i4 = getelementptr float, ptr @d, i64 %i
-  %i5 = tail call i1 @llvm.is.fpclass.f32(float 0.0, i32 0)
+  %i5 = tail call i1 @llvm.is.fpclass.f32(float %i3, i32 0)
   %i6 = select i1 %i5, float 0.0, float 0.0
   store float %i6, ptr %i4, align 4
   %i7 = add i64 %i, 1

llvm/test/Transforms/LoopVectorize/vector-freeze.ll

@@ -18,7 +18,8 @@ exit:
 
 loop:
   %tmp3 = phi ptr [ %tmp6, %loop ], [ %addr, %entry ]
-  %tmp4 = freeze i64 0
+  %l = load i64, ptr %tmp3
+  %tmp4 = freeze i64 %l
   %tmp5 = add i64 0, 0
   %tmp6 = getelementptr inbounds ptr, ptr %tmp3, i64 1
   %tmp7 = icmp eq ptr %tmp6, null