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lib/Conversion/ImportVerilog Expand file tree Collapse file tree 1 file changed +4
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lines changed Original file line number Diff line number Diff line change @@ -410,9 +410,9 @@ struct RvalueExprVisitor {
410410 SmallVector<Value> operands;
411411 for (auto *operand : expr.operands ()) {
412412 auto value = context.convertRvalueExpression (*operand);
413- if (!value)
414- continue ;
415413 value = context.convertToSimpleBitVector (value);
414+ if (!value)
415+ return {};
416416 operands.push_back (value);
417417 }
418418 return builder.create <moore::ConcatOp>(loc, operands);
@@ -872,12 +872,9 @@ struct RvalueExprVisitor {
872872 value = context.convertRvalueExpression (*stream.operand );
873873 }
874874
875- if (!value)
876- return {};
877875 value = context.convertToSimpleBitVector (value);
878- if (!value) {
876+ if (!value)
879877 return {};
880- }
881878 operands.push_back (value);
882879 }
883880 Value value;
@@ -974,7 +971,7 @@ struct LvalueExprVisitor {
974971 for (auto *operand : expr.operands ()) {
975972 auto value = context.convertLvalueExpression (*operand);
976973 if (!value)
977- continue ;
974+ return {} ;
978975 operands.push_back (value);
979976 }
980977 return builder.create <moore::ConcatRefOp>(loc, operands);
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