[MooreToCore][Sim] Added support for moore.fmt.real (#9397)

Since LLVM doesn't have a very clean separation between printing out
floats in FP vs Scientific Notation (see `toStringImpl` [here]
(https://llvm.org/doxygen/APFloat_8cpp_source.html)), I decided to do
what Verilator does here: call [`snprintf`](https://github.com/sifive/verilator/blob/master/include/verilated.cpp#L837).
So for now, we're doing C-style prints - I plan to make a patch to LLVM
to disambiguate `toStringImpl` for FP notation, but that's for later.

Overview: 1. By default, the precision for floating point numbers is 6
for `%f` and `%e` 2. `$fieldWidth` is used to determine padding,  and
`$fracDigits` is used to denote the number of digits after the decimal
point/the alphabet 'e' - the actual formatting is handled by `snprintf`
under the hood 3. `%g` has a unique formatting logic:


For `exp ≥ 0`: Uses decimal notation if `exp + 1 ≤ max(1, fracDigits)`,
otherwise switches to scientific notation with `max(0, fracDigits - 1)`
fractional digits.

For `exp < 0`: If `exp ≥ -4`: Uses decimal notation with `max(b - 1,
0) + |exp|` fractional digits If `exp < -4`: Uses scientific notation
with `max(b - 1, 0)` fractional digits Everything is stripped of
trailing zeroes after the decimal point/the alphabet 'e', which, as
expected, is in conjunction with [this](https://en.cppreference.com/w/cpp/io/c/printf.html#Notes)

I've introduced this patch to fix the current `fmt.real` legalization
errors and improve test coverage. I think it is beneficial to merge
this even if we remove the formatting folders later, since this might
serve as reference code for the arcilator runtime (#7692).

Author: KavyaChopra04

include/circt/Dialect/Moore/MooreOps.td

@@ -2030,13 +2030,19 @@ def FormatRealOp : MooreOp<"fmt.real", [Pure]> {
   See IEEE 1800-2017 § 21.2.1.2 "Format specifications".
   }];
   let arguments = (ins
-  RealType:$value,
-  RealFormatAttr:$format
+    RealType:$value,
+    RealFormatAttr:$format,
+    IntAlignAttr:$alignment,
+    OptionalAttr<I32Attr>:$fieldWidth,
+    OptionalAttr<I32Attr>:$fracDigits
   );
   let results = (outs FormatStringType:$result);
   let assemblyFormat = [{
-      $format $value `,`
-      attr-dict `:` type($value)
+    $format $value `,`
+    `align` $alignment
+    (`fieldWidth` $fieldWidth^)?
+    (`fracDigits` $fracDigits^)?
+    attr-dict `:` type($value)
   }];
 }
 

include/circt/Dialect/Sim/SimOps.h

@@ -45,6 +45,12 @@ static inline mlir::Value getFormattedValue(mlir::Operation *fmtOp) {
     return fmt.getValue();
   if (auto fmt = llvm::dyn_cast_or_null<circt::sim::FormatCharOp>(fmtOp))
     return fmt.getValue();
+  if (auto fmt = llvm::dyn_cast_or_null<circt::sim::FormatGeneralOp>(fmtOp))
+    return fmt.getValue();
+  if (auto fmt = llvm::dyn_cast_or_null<circt::sim::FormatFloatOp>(fmtOp))
+    return fmt.getValue();
+  if (auto fmt = llvm::dyn_cast_or_null<circt::sim::FormatScientificOp>(fmtOp))
+    return fmt.getValue();
   return {};
 }
 

include/circt/Dialect/Sim/SimOps.td

@@ -257,6 +257,86 @@ def FormatBinOp : SimOp<"fmt.bin", [Pure]> {
   }];
 }
 
+def FormatScientificOp : SimOp<"fmt.exp", [Pure]> {
+  let summary = "Real format specifier";
+  let description = [{
+    Format the given real value in scientific (exponential) notation
+  }];
+
+  let arguments = (ins AnyFloat:$value,
+    DefaultValuedAttr<BoolAttr,"false">:$isLeftAligned,
+    OptionalAttr<I32Attr>:$fieldWidth,
+    DefaultValuedAttr<I32Attr,"6">:$fracDigits
+  );
+  let results = (outs FormatStringType:$result);
+
+  let hasFolder = true;
+
+  let assemblyFormat = [{
+    $value
+    (`isLeftAligned` $isLeftAligned^)?
+    (`fieldWidth` $fieldWidth^)?
+    (`fracDigits` $fracDigits^)?
+    attr-dict `:` qualified(type($value))
+  }];
+}
+
+def FormatFloatOp : SimOp<"fmt.flt", [Pure]> {
+  let summary = "Real format specifier";
+  let description = [{
+    Format the given real value in floating point (decimal) notation  
+  }];
+
+  let arguments = (ins AnyFloat:$value,
+    DefaultValuedAttr<BoolAttr,"false">:$isLeftAligned,
+    OptionalAttr<I32Attr>:$fieldWidth,
+    DefaultValuedAttr<I32Attr,"6">:$fracDigits
+  );
+  let results = (outs FormatStringType:$result);
+
+  let hasFolder = true;
+
+  let assemblyFormat = [{
+    $value
+    (`isLeftAligned` $isLeftAligned^)?
+    (`fieldWidth` $fieldWidth^)?
+    (`fracDigits` $fracDigits^)?
+    attr-dict `:` qualified(type($value))
+  }];
+}
+
+def FormatGeneralOp : SimOp<"fmt.gen", [Pure]> {
+  let summary = "Real format specifier";
+  let description = [{
+    Format floating-point numbers using either decimal or scientific notation
+    based on the exponent and precision parameter fracDigits (default: 6)
+
+    For exp ≥ 0: 
+    Uses decimal notation if exp + 1 ≤ max(1, fracDigits), otherwise switches
+    to scientific notation with max(0, fracDigits - 1) fractional digits
+    
+    For exp < 0:
+    If exp ≥ -4: Uses decimal notation with max(b - 1, 0) + |exp| fractional digits
+    If exp < -4: Uses scientific notation with max(b - 1, 0) fractional digits
+  }];
+
+  let arguments = (ins AnyFloat:$value,
+    DefaultValuedAttr<BoolAttr,"false">:$isLeftAligned,
+    OptionalAttr<I32Attr>:$fieldWidth,
+    DefaultValuedAttr<I32Attr,"6">:$fracDigits
+  );
+  let results = (outs FormatStringType:$result);
+
+  let hasFolder = true;
+
+  let assemblyFormat = [{
+    $value
+    (`isLeftAligned` $isLeftAligned^)?
+    (`fieldWidth` $fieldWidth^)?
+    (`fracDigits` $fracDigits^)?
+    attr-dict `:` qualified(type($value))
+  }];
+}
 
 def FormatDecOp : SimOp<"fmt.dec", [Pure]> {
   let summary = "Decimal format specifier";

lib/Conversion/ImportVerilog/FormatStrings.cpp

@@ -130,7 +130,9 @@ struct FormatStringParser {
                                                  : IntFormat::HexLower);
 
     case 'e':
+      return emitReal(arg, options, RealFormat::Exponential);
     case 'g':
+      return emitReal(arg, options, RealFormat::General);
     case 'f':
       return emitReal(arg, options, RealFormat::Float);
 
@@ -210,13 +212,26 @@ struct FormatStringParser {
     auto value = context.convertRvalueExpression(
         arg, moore::RealType::get(context.getContext(), moore::RealWidth::f64));
 
+    IntegerAttr widthAttr = nullptr;
+    if (options.width) {
+      widthAttr = builder.getI32IntegerAttr(*options.width);
+    }
+
+    IntegerAttr precisionAttr = nullptr;
+    if (options.precision) {
+      if (*options.precision)
+        precisionAttr = builder.getI32IntegerAttr(*options.precision);
+      else
+        // If precision is 0, we set it to 1 instead
+        precisionAttr = builder.getI32IntegerAttr(1);
+    }
+
+    auto alignment = options.leftJustify ? IntAlign::Left : IntAlign::Right;
     if (!value)
       return failure();
 
-    // TODO add support for specifics such as width etc
-
-    fragments.push_back(
-        moore::FormatRealOp::create(builder, loc, value, format));
+    fragments.push_back(moore::FormatRealOp::create(
+        builder, loc, value, format, alignment, widthAttr, precisionAttr));
 
     return success();
   }

lib/Conversion/MooreToCore/MooreToCore.cpp

@@ -2046,6 +2046,40 @@ struct FormatIntOpConversion : public OpConversionPattern<FormatIntOp> {
   }
 };
 
+struct FormatRealOpConversion : public OpConversionPattern<FormatRealOp> {
+  using OpConversionPattern::OpConversionPattern;
+
+  LogicalResult
+  matchAndRewrite(FormatRealOp op, OpAdaptor adaptor,
+                  ConversionPatternRewriter &rewriter) const override {
+    auto fracDigitsAttr = adaptor.getFracDigitsAttr();
+
+    auto fieldWidthAttr = adaptor.getFieldWidthAttr();
+    bool isLeftAligned = adaptor.getAlignment() == IntAlign::Left;
+    mlir::BoolAttr isLeftAlignedAttr = rewriter.getBoolAttr(isLeftAligned);
+
+    switch (op.getFormat()) {
+    case RealFormat::General:
+      rewriter.replaceOpWithNewOp<sim::FormatGeneralOp>(
+          op, adaptor.getValue(), isLeftAlignedAttr, fieldWidthAttr,
+          fracDigitsAttr);
+      return success();
+    case RealFormat::Float:
+      rewriter.replaceOpWithNewOp<sim::FormatFloatOp>(
+          op, adaptor.getValue(), isLeftAlignedAttr, fieldWidthAttr,
+          fracDigitsAttr);
+      return success();
+    case RealFormat::Exponential:
+      rewriter.replaceOpWithNewOp<sim::FormatScientificOp>(
+          op, adaptor.getValue(), isLeftAlignedAttr, fieldWidthAttr,
+          fracDigitsAttr);
+      return success();
+    default:
+      return rewriter.notifyMatchFailure(op, "unsupported real format");
+    }
+  }
+};
+
 struct DisplayBIOpConversion : public OpConversionPattern<DisplayBIOp> {
   using OpConversionPattern::OpConversionPattern;
 
@@ -2470,6 +2504,7 @@ static void populateOpConversion(ConversionPatternSet &patterns,
     FormatLiteralOpConversion,
     FormatConcatOpConversion,
     FormatIntOpConversion,
+    FormatRealOpConversion,
     DisplayBIOpConversion
   >(typeConverter, patterns.getContext());
   // clang-format on

lib/Dialect/Sim/SimOps.cpp

@@ -74,6 +74,32 @@ static StringAttr formatIntegersByRadix(MLIRContext *ctx, unsigned radix,
   return {};
 }
 
+static StringAttr formatFloatsBySpecifier(MLIRContext *ctx, Attribute value,
+                                          bool isLeftAligned,
+                                          std::optional<unsigned> fieldWidth,
+                                          std::optional<unsigned> fracDigits,
+                                          std::string formatSpecifier) {
+  if (auto floatAttr = llvm::dyn_cast_or_null<FloatAttr>(value)) {
+    std::string widthString = isLeftAligned ? "-" : "";
+    if (fieldWidth.has_value()) {
+      widthString += std::to_string(fieldWidth.value());
+    }
+    std::string fmtSpecifier = "%" + widthString + "." +
+                               std::to_string(fracDigits.value()) +
+                               formatSpecifier;
+
+    // Calculates number of bytes needed to store the format string
+    // excluding the null terminator
+    int bufferSize = std::snprintf(nullptr, 0, fmtSpecifier.c_str(),
+                                   floatAttr.getValue().convertToDouble());
+    std::string floatFmtBuffer(bufferSize, '\0');
+    snprintf(floatFmtBuffer.data(), bufferSize + 1, fmtSpecifier.c_str(),
+             floatAttr.getValue().convertToDouble());
+    return StringAttr::get(ctx, floatFmtBuffer);
+  }
+  return {};
+}
+
 ParseResult DPIFuncOp::parse(OpAsmParser &parser, OperationState &result) {
   auto builder = parser.getBuilder();
   // Parse visibility.
@@ -219,6 +245,24 @@ OpFoldResult FormatBinOp::fold(FoldAdaptor adaptor) {
       adaptor.getPaddingChar(), adaptor.getSpecifierWidth());
 }
 
+OpFoldResult FormatScientificOp::fold(FoldAdaptor adaptor) {
+  return formatFloatsBySpecifier(
+      getContext(), adaptor.getValue(), adaptor.getIsLeftAligned(),
+      adaptor.getFieldWidth(), adaptor.getFracDigits(), "e");
+}
+
+OpFoldResult FormatFloatOp::fold(FoldAdaptor adaptor) {
+  return formatFloatsBySpecifier(
+      getContext(), adaptor.getValue(), adaptor.getIsLeftAligned(),
+      adaptor.getFieldWidth(), adaptor.getFracDigits(), "f");
+}
+
+OpFoldResult FormatGeneralOp::fold(FoldAdaptor adaptor) {
+  return formatFloatsBySpecifier(
+      getContext(), adaptor.getValue(), adaptor.getIsLeftAligned(),
+      adaptor.getFieldWidth(), adaptor.getFracDigits(), "g");
+}
+
 OpFoldResult FormatCharOp::fold(FoldAdaptor adaptor) {
   auto width = getValue().getType().getIntOrFloatBitWidth();
   if (width > 8)

test/Conversion/ImportVerilog/basic.sv

@@ -1647,7 +1647,7 @@ module realToTimeConversion;
   // CHECK: [[REAL:%.+]] = moore.uint_to_real [[INT]] : i64 -> f64 
   // CHECK: [[SCALE:%.+]] = moore.constant_real 1.000000e+05 : f64 
   // CHECK: [[DIV:%.+]] = moore.fdiv [[REAL]], [[SCALE]] : f64 
-  // CHECK: [[FMT:%.+]] = moore.fmt.real float [[DIV]], : f64 
+  // CHECK: [[FMT:%.+]] = moore.fmt.real float [[DIV]], align right fracDigits 3 : f64 
   initial
     $display("%0.3f", $time);
 endmodule
@@ -1663,7 +1663,7 @@ module timeToRealConversion;
   // CHECK: [[UINT_TO_REAL:%.+]] = moore.uint_to_real [[LOGIC_TO_INT]] : i64 -> f64
   // CHECK: [[SCALE:%.+]] = moore.constant_real 1.000000e+05 : f64
   // CHECK: [[DIV:%.+]] = moore.fdiv [[UINT_TO_REAL]], [[SCALE]] : f64
-  // CHECK: [[FMT:%.+]] = moore.fmt.real float [[DIV]], : f64
+  // CHECK: [[FMT:%.+]] = moore.fmt.real float [[DIV]], align right : f64
   initial begin
     $display("%f", x);
    end

test/Conversion/ImportVerilog/builtins.sv

@@ -92,8 +92,25 @@ function void DisplayAndSeverityBuiltins(int x, real r);
   // CHECK: moore.fmt.int octal [[X]], align left, pad zero width 19 : i32
   $write("%-19o", x);
 
-  // CHECK: moore.fmt.real float [[R]]
+  // CHECK: moore.fmt.real float [[R]], align right : f64
   $write("%f", r);
+  // CHECK: moore.fmt.real exponential [[R]], align right : f64
+  $write("%e", r);
+  // CHECK: moore.fmt.real general [[R]], align right : f64
+  $write("%g", r);
+  // CHECK: moore.fmt.real float [[R]], align left fracDigits 1 : f64
+  $write("%-.f", r);
+  // CHECK: moore.fmt.real exponential [[R]], align right fieldWidth 10 : f64
+  $write("%10e", r);
+  // CHECK: moore.fmt.real general [[R]], align right fracDigits 5 : f64
+  $write("%0.5g", r);
+  // CHECK: moore.fmt.real float [[R]], align left fieldWidth 20 fracDigits 5 : f64
+  $write("%-20.5f", r);
+  // CHECK: moore.fmt.real exponential [[R]], align right fieldWidth 10 fracDigits 1 : f64
+  $write("%10.e", r);
+  // CHECK: moore.fmt.real general [[R]], align right fieldWidth 9 fracDigits 8 : f64
+  $write("%9.8g", r);
+
   // CHECK: [[XR:%.+]] = moore.sint_to_real [[X]] : i32 -> f64
   // CHECK: [[TMP:%.+]] = moore.fmt.real float [[XR]]
   // CHECK: moore.builtin.display [[TMP]]

test/Conversion/MooreToCore/basic.mlir

@@ -386,7 +386,7 @@ func.func @Statements(%arg0: !moore.i42) {
 }
 
 // CHECK-LABEL: func @FormatStrings
-func.func @FormatStrings(%arg0: !moore.i42) {
+func.func @FormatStrings(%arg0: !moore.i42, %arg1: !moore.f32, %arg2: !moore.f64) {
   // CHECK: [[TMP:%.+]] = sim.fmt.literal "hello"
   %0 = moore.fmt.literal "hello"
   // CHECK: sim.fmt.concat ([[TMP]], [[TMP]])
@@ -411,6 +411,21 @@ func.func @FormatStrings(%arg0: !moore.i42) {
   moore.fmt.int hex_lower %arg0, align right, pad zero : i42
   // CHECK: sim.fmt.hex %arg0, isUpper true paddingChar 32 specifierWidth 42 : i42
   moore.fmt.int hex_upper %arg0, align right, pad space width 42 : i42
+
+  // CHECK: sim.fmt.flt %arg1 isLeftAligned true : f32
+  moore.fmt.real float %arg1, align left : f32
+  // CHECK: sim.fmt.exp %arg2 isLeftAligned true : f64
+  moore.fmt.real exponential %arg2, align left : f64
+  // CHECK: sim.fmt.gen %arg1 isLeftAligned true : f32
+  moore.fmt.real general %arg1, align left fracDigits 6 : f32
+  // CHECK: sim.fmt.flt %arg2 isLeftAligned true fracDigits 10 : f64
+  moore.fmt.real float %arg2, align left fracDigits 10 : f64
+  // CHECK: sim.fmt.exp %arg1 fieldWidth 9 fracDigits 8 : f32
+  moore.fmt.real exponential %arg1, align right fieldWidth 9 fracDigits 8 : f32
+  // CHECK: sim.fmt.gen %arg2 : f64
+  moore.fmt.real general %arg2, align right : f64
+  // CHECK: sim.fmt.flt %arg1 fieldWidth 15 : f32
+  moore.fmt.real float %arg1, align right fieldWidth 15 : f32
   // CHECK: sim.proc.print [[TMP]]
   moore.builtin.display %0
   return

test/Dialect/Moore/basic.mlir

@@ -394,7 +394,7 @@ func.func @WaitDelay(%arg0: !moore.time) {
 
 // CHECK-LABEL: func.func @FormatStrings
 // CHECK-SAME: %arg0: !moore.format_string
-func.func @FormatStrings(%arg0: !moore.format_string, %arg1: !moore.i42) {
+func.func @FormatStrings(%arg0: !moore.format_string, %arg1: !moore.i42, %arg2: !moore.f32, %arg3: !moore.f64) {
   // CHECK: moore.fmt.literal "hello"
   moore.fmt.literal "hello"
   // CHECK: moore.fmt.concat ()
@@ -421,6 +421,17 @@ func.func @FormatStrings(%arg0: !moore.format_string, %arg1: !moore.i42) {
   moore.fmt.int hex_lower %arg1, align left, pad zero width 42 : i42
   // CHECK: moore.fmt.int hex_upper %arg1, align left, pad zero width 42 : i42
   moore.fmt.int hex_upper %arg1, align left, pad zero width 42 : i42
+
+  // CHECK: moore.fmt.real float %arg2, align left : f32
+  moore.fmt.real float %arg2, align left : f32
+  // CHECK: moore.fmt.real exponential %arg3, align left : f64
+  moore.fmt.real exponential %arg3, align left : f64
+  // CHECK: moore.fmt.real general %arg3, align right fieldWidth 9 fracDigits 8 : f64
+  moore.fmt.real general %arg3, align right fieldWidth 9 fracDigits 8 : f64
+  // CHECK: moore.fmt.real float %arg2, align right fieldWidth 12 : f32
+  moore.fmt.real float %arg2, align right fieldWidth 12 : f32
+  // CHECK: moore.fmt.real exponential %arg3, align right fracDigits 5 : f64
+  moore.fmt.real exponential %arg3, align right fracDigits 5 : f64
   return
 }