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Description
A while ago, we have switched the LLHD dialect from a custom !llhd.sig
wrapper type to !hw.inout
in order to represent a reference to a signal slot that can be probed and driven. To support Verilog's time
values, we have to be able to store an !llhd.time
value in a variable and read and write that variable. Variables are effectively signals, and Verilog variables get mapped to llhd.sig
allocation operations. These return a reference type. This prevents us from creating time
variables today, since !hw.inout
forces isHWValueType
on the inner type, which llhd::TimeType
is not.
Ideally, we'd create something like an !llhd.ref<T>
type to represent a reference to a signal. In the future, we might want to add additional types for multi-driver nets.