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[ImportVerilog] Crash when assignment LHS is a multi-dimensional array concatΒ #8831

@fabianschuiki

Description

@fabianschuiki

The following crashes:

// circt-verilog
module Foo(input logic [1023:0] x);
  logic [7:0][63:0] a, b;
  always_comb {a, b} = x;
endmodule

Stack trace:

 #8 SmallVectorBase<unsigned int>::set_size(...) SmallVector.h:90:5
 #9 SmallVectorTemplateBase<Type, true>::push_back(...) SmallVector.h:565:11
#10 moore::ConcatRefOp::inferReturnTypes(...) MooreOps.cpp:672:11
#11 moore::ConcatRefOp::build(...) Moore.cpp.inc:8081:7

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