[Arc][arcilator] hw.bitcast Data Corruption for Aggregate Types with Non-Power-of-2 Element Widths in Arc #9417
Description
Description:
There is a data corruption issue in the arc backend when using hw.bitcast to convert between aggregate types (structs or arrays) and flattened integers. The issue manifests specifically when the aggregate contains elements with non-power-of-2 bit widths (e.g., i17, i33).
When casting such an aggregate to its corresponding flattened integer type and casting it back, the resulting data does not match the input. This suggests that the lowering or handling of hw.bitcast for these specific type combinations is preserving incorrect data during simulation.
Reproduction:
The following MLIR modules demonstrate the failure. In both cases, the output out is expected to match the input data, but the values are corrupted after the round-trip cast.
Example 1: Struct with odd-width integers (i17)
hw.module @Test_Point_17(in %clk : !seq.clock, in %data : !hw.struct<x: i17, y: i17>, out out : !hw.struct<x: i17, y: i17>) {
// Cast struct to flat integer
%0 = hw.bitcast %data : (!hw.struct<x: i17, y: i17>) -> i34
// Store in register
%1 = seq.compreg %0, %clk {sv.namehint = "reg"} : i34
// Cast back to struct
%2 = hw.bitcast %1 : (i34) -> !hw.struct<x: i17, y: i17>
hw.output %2 : !hw.struct<x: i17, y: i17>
}Example 2: Array of odd-width integers ([4 x i17])
hw.module @Test_Array_4xLogic_17(in %clk : !seq.clock, in %data : !hw.array<4xi17>, out out : !hw.array<4xi17>) {
// Cast array to flat integer
%0 = hw.bitcast %data : (!hw.array<4xi17>) -> i68
// Store in register
%1 = seq.compreg %0, %clk {sv.namehint = "reg"} : i68
// Cast back to array
%2 = hw.bitcast %1 : (i68) -> !hw.array<4xi17>
hw.output %2 : !hw.array<4xi17>
}Observed Behavior:
The out signal contains corrupted values that do not match the data input signal. This indicates that the state is not being preserved correctly across the hw.bitcast operations.