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[CIR][ThroughMLIR] Lower simple SwitchOp #1742
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5f03b07
[CIR][CIRGen][Builtin][Neon] Lower neon vmaxv_f32 (#1460)
AmrDeveloper cadb738
[CIR][CUDA] implement cuda constant variables (#1444)
anominos 4318044
[CIR][CUDA] Register __global__ functions (#1441)
AdUhTkJm 37abce3
[CIR][CUDA] Miscellanous bugfixes (#1462)
AdUhTkJm 49383ee
[CIR][CIRGen][Builtin][Neon] Lower neon vaddlv_s32 (#1464)
AmrDeveloper f556661
[CIR][CUDA] Generate CUDA destructor (#1470)
AdUhTkJm 52cf5c0
[CIR][CIRGen][builtin] handle `__lzcnt` (#1382)
FantasqueX fe2206a
[CIR][CUDA] Support builtin CUDA variables (#1458)
advay168 bf52b48
[CIR][CUDA] Support for inbuilt texture types (#1469)
JamesL425 9b0b837
[CIR] Lower `signext` and `zeroext` attributes (#1473)
AdUhTkJm f896192
[CIR][CIRGen][TBAA] Add support for vtable pointer (#1463)
PikachuHyA 6e31c6e
[CIR][CIRGen][builtin][X86] handle _mm_lfence (#1474)
FantasqueX 0aef9ed
[CIR][CUDA] Support device-side printf (#1475)
AdUhTkJm 867d736
[CIR][CIRGen][builtin] handle `__popcnt` (#1479)
FantasqueX 4f8c2a8
[CIR][CUDA] CallConvLowering for basic types in NVPTX (#1468)
AdUhTkJm 9e8806a
[CIR][NFC] Fix test failures caused by double spaces in check line (#…
seven-mile 17935d6
[CIR] Fix assertion in CIRGenTypes::isFuncParamTypeConvertible (#1487)
Lancern bce7507
[CIR][CIRGen][Builtin][Neon] Lower neon vabsd_s64 (#1489)
AmrDeveloper 6369507
[CIR] Implement ::verify for cir.atomic.xchg and cir.atomic.cmp_xchg …
Icaro-Nunes e74e226
[CIR][CIRGen][Builtin][Neon] Lower neon vcaled_f64 (#1495)
AmrDeveloper dd37e38
[CIR][CIRGen][builtin] handle _mm_pause (#1493)
shrikardongre d73d4cb
[CIR] Add support for nontemporal loads and stores (#1494)
Lancern e810ed3
[CIR] Add support for nontemporal loads and stores (#1494)
Lancern 6a3e881
[CIR] Emit nsw flag for unary integer operations (#1485)
Lancern 8f04109
[CIR][CIRGen][Builtin][Neon] Lower vcales_f32 (#1500)
AmrDeveloper 28b0986
[CIR][CodeGen] Add InsertionGuard for tryBodyScope (#1498)
bruteforceboy aefb5e7
[CIR][NFC] Generalize IdiomRecognizer (#1484)
AdUhTkJm 126956d
[CIR][NFC] Fix a wrong test case in fc293bb (#1503)
Lancern 778bedb
cir-translate: Use default target triple instead of x86 if no target …
mmha 86a85ef
[CIR][CUDA] Decorate global CUDA shadow variables with appropriate CI…
Sharp-Edged c66f98b
[CIR][CIRGen][Builtin] add `__builtin_tan` (#1502)
el-ev 0004b81
[CIR][CIRGen][Builtin][Neon] Lower neon vcaltd_f64 (#1505)
AmrDeveloper 59f739d
Revert "cir-translate: Use default target triple instead of x86 if no…
bcardosolopes 571e56f
[CIR] Match comment in upstream
bcardosolopes 6b19f09
[CIR] Backport clang commit to unxfail some builtin call (#1501)
FantasqueX a442924
[CIR][CodeGen] Replace LLVMIntrinsicCallOp with ACosOp in __builtin_e…
ayokunle321 2a6a8d8
Drop use of comprimised action
tstellar 49be891
Drop use of comprimised action
tstellar beccc39
[CIR][CodeGen] Support for `__builtin_elementwise_asin` (#1511)
ayokunle321 f60e828
[CIR] Un-xfail variadic calls (#1517)
AdUhTkJm a61a0d8
[CIR][CIRGen][Builtin][Neon] Lower vcalts_f32 (#1520)
AmrDeveloper ec817c5
[CIR][CodeGen] Support for `__builtin_elementwise_atan` (#1512)
ayokunle321 06cee96
[CIR] Add `AddressPointAttr` (#1508)
el-ev 3af8b3f
[CIR][CUDA] Handle clang builtin functions (#1496)
AdUhTkJm a468e26
[CIR] Refactor `StructType` with TableGen (#1504)
el-ev de866fa
[CIR][CodeGen] Add support for x86 memory fence (#1519)
shrikardongre 45e6aa1
[CIR][CIRGen][NFC] Handle `PragmaComment` in `emitTopLevelDecl` (#1521)
el-ev 54bc877
[CIR][LowerToLLVM][NFC] Refactor GlobalOpLowering for better readabil…
seven-mile 86d6c7b
[CIR][NFC] Rectify the documentation of convertTypeForMem (#1526)
seven-mile 4a39d45
[CIR][NFC] Sort emit functions in CIRGenFunction.h (#1524)
andykaylor 2089f53
[CIR][CIRGen][CUDA][NFC] Mirror CUDARuntime skeleton of OG (#1527)
seven-mile ea4458a
[CIR][CodeGen] Support for BI__rdtsc (#1523)
shrikardongre c861519
[CIR][ThroughMLIR] Add ATanOp Lowering (#1528)
ayokunle321 dfef455
[CIR][CIRGen][Builtin][Neon] Lower vabds_f32 and vabdd_f64 (#1531)
AmrDeveloper 7ec6a86
[CIR][ThroughMLIR] Add ACosOp Lowering (#1529)
ayokunle321 cf67fcf
[CIR][CIRGen][Builtin][Neon] Lower vmaxv_s32 (#1533)
AmrDeveloper 657db03
[CIR][ThroughMLIR] Add ASinOp Lowering (#1530)
ayokunle321 29fae5c
[CIR][CIRGen][Builtin][Neon] Lower vmaxv_u32 (#1534)
AmrDeveloper 40cce88
[CIR][CIRGen][Builtin][Neon] Lower vmaxvq_f64 (#1535)
AmrDeveloper 2b63b2c
[CIR][LowerToLLVM] Support for LinkerOptions lowering (#1532)
el-ev a2cbfbf
[CIR][CIRGen][Builtin][Neon] Lower vmaxnmvq f32 and f64 (#1537)
AmrDeveloper c9b58ef
[CIR][NFC] Backport refactoring of unary plus/minus handling (#1499)
andykaylor 91a32b0
[CIR][ThroughMLIR] Lower UnreachableOp (#1539)
AdUhTkJm ee4805a
[CIR][CIRGen][Builtin] Add `__builtin_elementwise_{log, log2, log10}`…
el-ev a2fe8b8
[CIR][CIRGen][Builtin][Neon] Lower vmaxnmv_f32 (#1544)
AmrDeveloper ea5bfe3
[CIR] Backport support zero init attr for all FP types (#1536)
AmrDeveloper 64f01d1
[CIR][ThroughMLIR] Add TanOp Lowering (#1540)
goxul 0a624db
[CIR] Unxfail memory effect attribute test (#1545)
FantasqueX a8c9ca9
[CIR][CIRGen][Builtin][Neon] Lower vminnmv_f32, vminnmvq_f64 and vmin…
AmrDeveloper b8299a5
[CIR] Fix for missing side effects during null pointer initialization…
andykaylor c653658
[CIR][CIRGen][Builtin][Neon] Lower vminv_s32 (#1550)
AmrDeveloper 13a5e65
[CIR][CIRGen][Builtin][Neon] Lower vminv_u32 (#1551)
AmrDeveloper 5987318
[CIR][CIRGen][Builtin] Add skeleton for missing builtin entries. (NFC…
el-ev 98e8811
[CIR][CIRGen][Builtin] Add several elementwise FP builtins (#1553)
el-ev 24ab10f
[CIR] Fix test failure caused by rebase (NFC) (#1558)
el-ev e5c6935
[CIR][CIRGen][Builtin][Neon] Lower vminvq_f32 and vminvq_f64 (#1555)
AmrDeveloper 61259b3
[CIR] Attempt to fix windows bots
bcardosolopes 84b4603
[CIR][NFC] Simplify struct type name creation (#1556)
andykaylor 6502f55
[CIR][ThroughMLIR] Templatize unary math op lowerings. (#1557)
goxul 4e7a223
[CIR] Rename `cir.struct` to `cir.record` and associated changes (#1559)
andykaylor cdef49c
[CIR][NFC] Reverse the polarity of RecordType complete/incomplete (#1…
andykaylor 204c03e
[CIR] Treat cir.record class and struct types equivalently. (#1564)
andykaylor 90833a4
[CIR] Always zero-extend shift amounts (#1568)
mmha 4c4a762
[CIR][ThroughMLIR] Lower TrapOp (#1561)
9f6742f
[CIR][CodeGen] Fix crash during exception cleanup (#1566)
bruteforceboy 4991421
[CIR][CodeGen] Supports const array user in the globals replacement (…
gitoleg 0bae1fd
[CIR] Infer MLIR context in type builders when possible (#1570)
xlauko 390cf25
[CIR] Replace RecordType data layout calculations (#1569)
andykaylor 6c34681
[CIR][NFC] Simplify BoolAttr builders (#1572)
xlauko 5933d4b
[CIR] Backport support zero init for VectorType (#1574)
AmrDeveloper 3b2053c
[CIR][CIRGen][Builtin][Neon] Lower vqsubd_s64 and vqadds_u32 (#1575)
AmrDeveloper 099c13c
[CIR] Simplify bool constant lowering (#1573)
xlauko 2d5a287
[CIR] Make UndefAttr use AttrBuilderWithInferredContext (#1577)
xlauko efc735d
[CIR] Make ZeroAttr use AttrBuilderWithInferredContext (#1576)
xlauko 8c264de
[CIR] Let ConstantOp builder infer its type automatically (#1578)
xlauko c7b27ec
[CIR] Make PoisonAttr use AttrBuilderWithInferredContext (#1579)
xlauko 395999a
[CIR] Change record type alias prefix from !ty_ to !rec_ (#1580)
andykaylor 92927ee
[CIR] Infer MLIRContext in attr builders when possible (#1582)
xlauko 9c7f38a
[CIR] Create CIR_TypedAttr common class (#1583)
xlauko d071f2f
[CIR][CodeGen] Emit RunCleanupsScope's dtor properly for ExprWithClea…
bruteforceboy c5f0f97
Reorder YieldOp parents lexicographically (#1586)
mmha 756da17
[CIR] Implement codegen for glvalue OpaqueValueExprs (#1587)
mmha d2645a7
[CIR] Remove unused variables (#1589)
xlauko 62a7cbd
[CIR] Backport Standardize element type name in Array and Vector Type…
AmrDeveloper a9eac21
[CIR] Backport global initialization for VectorType (#1592)
AmrDeveloper dec120e
[CIR] Fix typos after backport of standardized element type name (#1595)
darkbuck f22115a
[CIR] Backport replacing removed getFixedVectorType with vectortype g…
AmrDeveloper 1982513
[CIR] Backport VectorType verifier (#1590)
AmrDeveloper e552f87
[CIR] Refactor IntType constraints (#1593)
xlauko 2788db7
[CIR] Refactor floating point type constraints (#1594)
xlauko c154087
[CIR] Refactor complex type (#1596)
xlauko a922f1a
[CIR][CodeGen] Updates GlobalViewAttr's indices computation for the u…
gitoleg 54e3648
[CIR][CIRGen][Builtin][Neon] Lower vqaddd_s64 and vqaddd_u64 (#1599)
AmrDeveloper d32bb94
[CIR] Start silencing unused var warnings
bcardosolopes 86d0efd
[CIR] More unused var warnings pt 2
bcardosolopes 1e8297f
[CIR] Remove inferred context from pointer type getters (#1600)
xlauko d64637c
[CIR] Refactor VoidPtr constraint to CIR_VoidPtrType (#1601)
xlauko ce06512
[CIR] Remove implicit options from tablegen files (#1602)
xlauko 0678431
[CIR][Lowering] Lower delete array to LLVM (#1588)
ahmedshakill 301077a
[CIR] One more batch of fixing unused vars warnings (and others while…
bcardosolopes 2a034be
[CIR] Refactor constraints for integers, floats, and complex pointees…
xlauko b6db825
[CIR] Add missing tablegen include
bcardosolopes d5527cc
[CIR] Remove ABI handling from CIRGen call handling (#1604)
andykaylor 4c77420
[CIR] Add code to detect non-zero-initializable records (#1603)
andykaylor 7fa1da4
[CIR] Refactor pointers to RecordType constraints (#1610)
xlauko 74e4b40
[CIR] Refactor pointers to FuncType constraints (#1607)
xlauko 91c21c4
[CIR] Refactor pointers to ArrayType constraints (#1608)
xlauko 70813ef
[CIR][NFC] Remove redundant pointer casts (#1609)
xlauko 5df5009
[CIR] Refactor pointers to ExceptionInfoType constraints (#1612)
xlauko 3166478
[CIR] Backport folder implementation for VecExtractOp (#1613)
AmrDeveloper 1fb346d
[CIR][NFC] Fix more compiler warnings
bcardosolopes 594543f
[CIR][CodeGen] Emit dtor properly for objects in TernaryOp (#1614)
bruteforceboy 092c0df
[CIR][NFC] Eliminate ArgInfo structure (#1629)
andykaylor 57a49fd
[CIR] Backport add mlir Vec to elementTypeIfVector (#1622)
AmrDeveloper 8b050d4
[CIR] Remove unused testIfIsVoidTy function (#1623)
xlauko b7bc94c
[CIR] Recreate `isScalarType` as `CIR_AnyScalarType` constraint (#1625)
xlauko a99c839
[CIR] Refactor vector type constraints (#1626)
xlauko 88d7931
[CIR] Un-xfail some tests affected by GEP changes (#1621)
fangyi-zhou bc95e0b
[CIR] Add back ability to process cir files in cc1 (#1628)
fangyi-zhou 583e6b6
[CIR][NFC] Fix documentation and comment on data_member
bcardosolopes be501d5
[CIR] Fix offset calculation for global view (#1627)
fangyi-zhou 0c944f9
[CIR] Add back LoopOpInterface verification (#1635)
fangyi-zhou 3793010
[CIR] Simlipify string literal global creation (#1632)
andykaylor b28b6e1
[CIR] Simplify LangAttr to use enum directly (#1631)
xlauko 9e0d9b7
[CIR] Make OptInfoAttr use `struct` in assemblyFormat explicitly (#1633)
xlauko 466e3b2
[CIR] Simplify error emission to return failures directly (#1634)
xlauko 311a5aa
[CIR] Improve aligned store support (#1637)
andykaylor 9707b1d
[CIR][ThroughMLIR] Fix ForOp handling (#1615)
ac73827
Revert "[CIR] Add back LoopOpInterface verification (#1635)" (#1638)
fangyi-zhou 99c6b4b
[CIR][NFC] Format bool type definition (#1639)
xlauko bcc30f4
[CIR] Fix load alignment (#1640)
andykaylor 791c327
[CIR] Generate SelectOp instead of TernaryOp for if cheap enough to e…
mmha 25dda94
[CIR] Add back verification of LoopOpInterface (#1641)
fangyi-zhou 6f9d25c
[CIR] Backport Allow different Int types together in Vec ShiftOp (#1643)
AmrDeveloper f04dd8d
[CIR][ThroughMLIR] Lower uncanonicalized fors to whiles (#1644)
576d2ff
[CIR] Streamline creation of `mlir::IntegerAttr`s using mlir::Builder…
xlauko 16718e6
[CIR][Transforms] Fix flattening for TryOp with empty catch region (#…
bruteforceboy 105d898
[CIR][Lowering] Core dialects: passthrough symbol visibility (#1620)
felixdaas 868a945
[CIR] Mark `addInt` as NYI due to incorrect implementation (#1648)
xlauko 04c46ba
[CIR] Backport fixsing ShuffleDynamicOp maskbits logic (#1649)
AmrDeveloper 6e116b5
[CIR][NFC] Backport typo fixes from upstream (#1650)
xlauko 6e5fa09
[CIR] Skip generation of a continue block when flattening TernaryOp (…
mmha 94402e2
[CIR][CodeGen] Insert new blocks after ThrowOp expressions (#1654)
bruteforceboy 4c5a4d9
[CIR][NFS] Remove unnecessary asserts (#1659)
AmrDeveloper ca092dd
[CIR][NFC] Use actual operand name in adaptor-obtained operands (#1661)
xlauko 7b8a99b
[CIR][Lowering] Lower CIR ptrmask to LLVM ptrmask (#1663)
Jezurko 47fa3eb
[CIR] Backport support for global ComplexType init (#1665)
AmrDeveloper f077eec
[CIR][NFC] Use `getType()` instead of more verbose `getResult().getTy…
xlauko 209df5a
[CIR] Fix dso_local Func/GlobalOp printer and align with llvm format …
xlauko fb381bb
[CIR][CIRGen] Support for `__builtin_elementwise_atan2` (#1655)
mariusdr 2afbab5
[CIR][ThroughMLIR] Improving eraseIfSafe and canonical ForOp lowering…
felixdaas 481118d
[CIR][CodeGen] Implement tryMarkNoThrow and update wrong test (#1664)
bruteforceboy 960c0b0
[CIR] Add support for DumpRecordLayouts (#1667)
Andres-Salamanca bc6df70
[CIR] Backport Complex init with empty init list (#1668)
AmrDeveloper 51e17c0
[CIR][ThroughMLIR] Handle ContinueOp directly under a WhileOp (#1669)
terapines-osc-cir 26b1332
[CIR] Backport Extending VecShuffleOp verifier to catch invalid index…
AmrDeveloper 25a9b13
[CIR] Avoid unnecessary type cache clearing with Enum type completion…
andykaylor 74f16f7
[CIR] Remove parens from C++ address-related ops' assembly format (#1…
andykaylor e90e366
[CIR][NFC] Refactor GotoSolver with faster containers (#1676)
Arthur-Chang016 849edca
[CIR] Backport Array of complex type (#1680)
AmrDeveloper 3401122
[CIR][ThroughMLIR] Lower ContinueOp nested inside IfOp (#1682)
terapines-osc-cir 1ca3376
[ThroughMLIR] basic printf support (#1687)
felixdaas 6ddc48e
[CIR] Update Accumulate Bits Algorithm (#1688)
Andres-Salamanca bd610ad
[CIR] Clean up enum attributes (#1678)
xlauko dd5986c
[CIR] Remove redundant operation traits and use AllTypesMatch instead…
xlauko c21ed7f
[CIR][CIRGen][Builtin][X86] Lower lzcnt_u16, lzcnt_u32, lzcnt_u64 (#1…
RiverDave 734afe6
[CIR][CIRGen] Support for `__builtin_elementwise_exp2` (#1656)
mariusdr daaf817
[CIR][CIRGen][Builtin][Neon] Lower neon_vaddlv_s8 and neon_vaddlv_u8 …
RiverDave 32e3971
[CIR] Support inheritance in `InitListExpr` (#1684)
HerrCai0907 076219a
[CIR][CIRGen][Builtin][X86] Lower __rdtscp (#1686)
RiverDave 31c0728
[CIR] Use ComplexRealOp for RValue `__real__` operator (#1689)
AmrDeveloper 24e9e75
[CIR] Use ComplexRealOp for RValue __imag__ operator (#1690)
AmrDeveloper f74a380
[CIR][CIRGen][Builtin][X86] Add support for tzcnt_u16, tzcnt_u32, and…
ayokunle321 4ddd7e2
[CIR][ThoughMLIR] Support ContinueOp in nested whiles (#1694)
terapines-osc-cir bcb595a
[CIR] Backport ChooseExpr for Scalar expr (#1700)
AmrDeveloper 19c36a6
[CIR] Backport VecCreateOp Folder (#1702)
AmrDeveloper 3adac49
[CIR] Backport VecSplatOp simplifier (#1704)
AmrDeveloper 96a37b4
[CIR] Align CastKind representation with upstream (#1695)
xlauko ceb178c
[CIR] Reindex CaseOpKind to align with upstream (#1696)
xlauko 2070fcf
[CIR] Reindex SideEffect enum to align with upstream (#1697)
xlauko 7bef37f
[CIR] Reindex VisibilityAttr to align with upstream (#1698)
xlauko ffa62b5
[CIR] Implement ChooseExpr for ComplexType (#1693)
AmrDeveloper 4820d60
[CIR] Backport VecTernaryOp folder (#1705)
AmrDeveloper 6ef0921
[CIR] support union without field in C++ (#1703)
HerrCai0907 ad9389c
[CIR][CIRGen][Builtin][X86] Lower xsave related intrinsics (#1715)
RiverDave f87bee5
[CIR][CIRGen] Convert trivial copy constructor and assignment operato…
Arthur-Chang016 b22961d
[CIR] Refactor type interfaces (#1713)
xlauko 30718ac
[CIR] Implement SizedTypeInterface to make isSized hookable. (#1714)
xlauko 48c2115
[CIR] Implement CompoundLiteralExpr for ComplexType (#1701)
AmrDeveloper 9642d52
[CIR] Backport VecShuffleOp folder (#1707)
AmrDeveloper 3235864
[CIR][ThroughMLIR] Lower For to While when it contains break/continue…
terapines-osc-cir 5da800f
[CIR] Implement GenericSelectionExpr (#1718)
AmrDeveloper 8bb46a9
[CIR] Implement PackIndexingExpr for ScalarExpr (#1719)
AmrDeveloper 7b07102
[CIR] Backport fix verifier error messages for Complex Real and Imag …
AmrDeveloper 4b45e3b
[CIR] Backport VecShuffleDynamicOp folder (#1708)
AmrDeveloper 56b5111
[CIR] Backport CIRAttrConstraints definitions (#1723)
xlauko 7527508
[CIR] Introduce IntTypeInterface to allow uniform integer types handl…
xlauko e52d295
[CIR] Clean up IntAttr (#1725)
xlauko 289f05f
[CIR] Clean up FPAttr (#1726)
xlauko fa2193e
[CIR] Untie Type and Attribute definitions (#1727)
xlauko e60a7d2
[CIR][CIRGen][Builtin][X86] Lower `vec_ext` related intrinsics (#1717)
RiverDave da1e2cd
[CIR] Backport VecCmpOp folder (#1709)
AmrDeveloper 1bbf343
[Infra] Attempt to move to windows-2022 and get windows bots back due…
bcardosolopes 60da1a4
[CIR] Improved `cir::CastOp` verifier to allow bitcasts between types…
tommymcm 0f6459e
Revert "[Infra] Attempt to move to windows-2022 and get windows bots …
bcardosolopes f17639c
[CIR][NFC] Remove code after return statement (#1730)
AmrDeveloper 165bb53
Bump the github-actions group with 13 updates (#1721)
dependabot[bot] d039db9
Bump the llvm-docs-requirements group in /llvm/docs with 28 updates (…
dependabot[bot] c0fb3b0
[CIR][CIRGen][Builtin][X86] Lower mm_prefetch (#1675)
RiverDave 33c739f
[CIR][CIRGen][Builtin][X86] Lower `vec_set` related intrinsics (#1731)
RiverDave f9d47e9
[CIR][CIRGen][Builtin][NFC] Mirror X86 OG intrinsic test file structu…
RiverDave b7dffc3
[CIR] Refactor AddressSpace to use enum more thoroughly instead of at…
xlauko d030c9b
[CIR][CIRGen][X86] lower Masked Store related intrinsics (#1734)
RiverDave 2bc0571
[CIR] Backport ArraySubscript for ComplexType (#1736)
AmrDeveloper 5d27d15
[CIR] Backport functional cast to ComplexType (#1737)
AmrDeveloper 577e995
[CIR][CIRGen][Builtin][X86] Lower AVX mask-to-vector conversion intri…
RiverDave bc91ef4
[CI][Github] Bump Windows Container to Server 2022
boomanaiden154 17aa78d
[CIR] Reformat Ops to use common `CIR_` prefix and definition traits …
xlauko ee785a0
[CIR] Fix Global Ctor/Dtor priority attributes (#1743)
xlauko b0901d3
Revert "[CI][Github] Bump Windows Container to Server 2022"
bcardosolopes 504714a
[CIR] Implement function alias lowering (#1739)
andykaylor aa1692a
[CIR][CodeGen] Fix catch-all dispatch and multiple destructor calls (…
bruteforceboy fe8b9ca
[CIR][NFC] Backport upstream bit operations changes (#1744)
Lancern ae25175
[CIR] Reformat Attr to use common CIR_ prefix and traits style (#1746)
xlauko 8f89224
[CIR][NFC] Add placeholders for remaining x86 intrinsics (#1754)
RiverDave 2a126d2
[CIR] Fix array init loop condition (#1758)
andykaylor 754a11a
[CIR][NFC] Pass enum kind directly to complex cast helpers (#1757)
AmrDeveloper c6a4f77
[CIR] Add `get_element` operation for computing pointer to array elem…
tommymcm 7dcc0ac
[CIR][ThroughMLIR] Lower simple SwitchOp
AdUhTkJm fbeb0a2
Merge remote-tracking branch 'origin/main' into cir-switch
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clang/lib/CIR/Lowering/ThroughMLIR/MLIRLoweringPrepare.cpp
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#include "mlir/IR/BuiltinOps.h" | ||
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#include "mlir/IR/IRMapping.h" | ||
#include "mlir/Pass/Pass.h" | ||
#include "mlir/Transforms/DialectConversion.h" | ||
#include "clang/CIR/Dialect/Builder/CIRBaseBuilder.h" | ||
#include "clang/CIR/Dialect/IR/CIRDialect.h" | ||
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using namespace llvm; | ||
using namespace cir; | ||
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namespace cir { | ||
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struct MLIRLoweringPrepare | ||
: public mlir::PassWrapper<MLIRLoweringPrepare, | ||
mlir::OperationPass<mlir::ModuleOp>> { | ||
// `scf.index_switch` requires that switch branches do not fall through. | ||
// We need to copy the next branch's body when the current `cir.case` does not | ||
// terminate with a break. | ||
void removeFallthrough(llvm::SmallVector<CaseOp> &cases); | ||
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void runOnOp(mlir::Operation *op); | ||
void runOnOperation() final; | ||
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StringRef getDescription() const override { | ||
return "Rewrite CIR module to be more 'scf' dialect-friendly"; | ||
} | ||
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StringRef getArgument() const override { return "mlir-lowering-prepare"; } | ||
}; | ||
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// `scf.index_switch` requires that switch branches do not fall through. | ||
// We need to copy the next branch's body when the current `cir.case` does not | ||
// terminate with a break. | ||
void MLIRLoweringPrepare::removeFallthrough(llvm::SmallVector<CaseOp> &cases) { | ||
CIRBaseBuilderTy builder(getContext()); | ||
// Note we enumerate in the reverse order, to facilitate the cloning. | ||
for (auto it = cases.rbegin(); it != cases.rend(); it++) { | ||
auto caseOp = *it; | ||
auto ®ion = caseOp.getRegion(); | ||
auto &lastBlock = region.back(); | ||
mlir::Operation &last = lastBlock.back(); | ||
if (isa<BreakOp>(last)) | ||
continue; | ||
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// The last op must be a `cir.yield`. As it falls through, we copy the | ||
// previous case's body to this one. | ||
if (!isa<YieldOp>(last)) { | ||
caseOp->dump(); | ||
continue; | ||
} | ||
assert(isa<YieldOp>(last)); | ||
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// If there's no previous case, we can simply change the yield into a break. | ||
if (it == cases.rbegin()) { | ||
builder.setInsertionPointAfter(&last); | ||
builder.create<BreakOp>(last.getLoc()); | ||
last.erase(); | ||
continue; | ||
} | ||
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auto prevIt = it; | ||
--prevIt; | ||
CaseOp &prev = *prevIt; | ||
auto &prevRegion = prev.getRegion(); | ||
mlir::IRMapping mapping; | ||
builder.cloneRegionBefore(prevRegion, region, region.end()); | ||
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// We inline the block to the end. | ||
// This is required because `scf.index_switch` expects that each of its | ||
// region contains a single block. | ||
mlir::Block *cloned = lastBlock.getNextNode(); | ||
for (auto it = cloned->begin(); it != cloned->end();) { | ||
auto next = it; | ||
next++; | ||
it->moveBefore(&last); | ||
it = next; | ||
} | ||
cloned->erase(); | ||
last.erase(); | ||
} | ||
} | ||
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void MLIRLoweringPrepare::runOnOp(mlir::Operation *op) { | ||
if (auto switchOp = dyn_cast<SwitchOp>(op)) { | ||
llvm::SmallVector<CaseOp> cases; | ||
if (!switchOp.isSimpleForm(cases)) | ||
llvm_unreachable("NYI"); | ||
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removeFallthrough(cases); | ||
return; | ||
} | ||
llvm_unreachable("unexpected op type"); | ||
} | ||
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void MLIRLoweringPrepare::runOnOperation() { | ||
auto module = getOperation(); | ||
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llvm::SmallVector<mlir::Operation *> opsToTransform; | ||
module->walk([&](mlir::Operation *op) { | ||
if (isa<SwitchOp>(op)) | ||
opsToTransform.push_back(op); | ||
}); | ||
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for (auto *op : opsToTransform) | ||
runOnOp(op); | ||
} | ||
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std::unique_ptr<mlir::Pass> createMLIRLoweringPreparePass() { | ||
return std::make_unique<MLIRLoweringPrepare>(); | ||
} | ||
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} // namespace cir |
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -fno-clangir-direct-lowering -emit-mlir=core %s -o %t.mlir | ||
// RUN: FileCheck --input-file=%t.mlir %s | ||
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void fallthrough() { | ||
int i = 0; | ||
switch (i) { | ||
case 2: | ||
i++; | ||
case 3: | ||
i++; | ||
break; | ||
case 8: | ||
i++; | ||
} | ||
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// This should copy the `i++; break` in case 3 to case 2. | ||
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// CHECK: memref.alloca_scope { | ||
// CHECK: %[[I:.+]] = memref.load %alloca[] | ||
// CHECK: %[[CASTED:.+]] = arith.index_cast %[[I]] | ||
// CHECK: scf.index_switch %[[CASTED]] | ||
// CHECK: case 2 { | ||
// CHECK: %[[I:.+]] = memref.load %alloca[] | ||
// CHECK: %[[ONE:.+]] = arith.constant 1 | ||
// CHECK: %[[ADD:.+]] = arith.addi %[[I]], %[[ONE]] | ||
// CHECK: memref.store %[[ADD]], %alloca[] | ||
// CHECK: %[[I:.+]] = memref.load %alloca[] | ||
// CHECK: %[[ONE:.+]] = arith.constant 1 | ||
// CHECK: %[[ADD:.+]] = arith.addi %[[I]], %[[ONE]] | ||
// CHECK: memref.store %[[ADD]], %alloca[] | ||
// CHECK: scf.yield | ||
// CHECK: } | ||
// CHECK: case 3 { | ||
// CHECK: %[[I:.+]] = memref.load %alloca[] | ||
// CHECK: %[[ONE:.+]] = arith.constant 1 | ||
// CHECK: %[[ADD:.+]] = arith.addi %[[I]], %[[ONE]] | ||
// CHECK: memref.store %[[ADD]], %alloca[] | ||
// CHECK: scf.yield | ||
// CHECK: } | ||
// CHECK: case 8 { | ||
// CHECK: %[[I:.+]] = memref.load %alloca[] | ||
// CHECK: %[[ONE:.+]] = arith.constant 1 | ||
// CHECK: %[[ADD:.+]] = arith.addi %[[I]], %[[ONE]] | ||
// CHECK: memref.store %[[ADD]], %alloca[] | ||
// CHECK: scf.yield | ||
// CHECK: } | ||
// CHECK: default { | ||
// CHECK: } | ||
// CHECK: } | ||
} |
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