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clean up
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mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp

Lines changed: 19 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -190,10 +190,12 @@ LogicalResult ConvertFloatToTF32Op::verify() {
190190
}
191191

192192
LogicalResult ConvertF32x2ToF6x2Op::verify() {
193+
llvm::LLVMContext &ctx = getContext();
194+
193195
if (!llvm::isa<mlir::Float6E2M3FNType, mlir::Float6E3M2FNType>(getDstTy())) {
194196
return emitOpError("Only ")
195-
<< mlir::Float6E2M3FNType::get(getContext()) << " and "
196-
<< mlir::Float6E3M2FNType::get(getContext())
197+
<< mlir::Float6E2M3FNType::get(ctx) << " and "
198+
<< mlir::Float6E3M2FNType::get(ctx)
197199
<< " types are supported for conversions from f32x2 to f6x2.";
198200
}
199201
return success();
@@ -210,51 +212,55 @@ LogicalResult ConvertF32x2ToF8x2Op::verify() {
210212

211213
bool hasRelu = getRelu();
212214

215+
llvm::LLVMContext &ctx = getContext();
216+
213217
return llvm::TypeSwitch<mlir::Type, LogicalResult>(getDstTy())
214218
.Case<mlir::Float8E4M3FNType, mlir::Float8E5M2Type>(
215219
[&](mlir::Type) -> LogicalResult {
216220
if (!isRoundingModeRN) {
217221
return emitOpError("Only RN rounding mode is supported for "
218222
"conversions from f32x2 to ")
219-
<< mlir::Float8E4M3FNType::get(getContext()) << " and "
220-
<< mlir::Float8E5M2Type::get(getContext()) << " types";
223+
<< mlir::Float8E4M3FNType::get(ctx) << " and "
224+
<< mlir::Float8E5M2Type::get(ctx) << " types";
221225
}
222226
if (!isSatFinite) {
223227
return emitOpError("Only SATFINITE saturation mode is supported "
224228
"for conversions "
225229
"from f32x2 to ")
226-
<< mlir::Float8E4M3FNType::get(getContext()) << " and "
227-
<< mlir::Float8E5M2Type::get(getContext()) << " types";
230+
<< mlir::Float8E4M3FNType::get(ctx) << " and "
231+
<< mlir::Float8E5M2Type::get(ctx) << " types";
228232
}
229233
return success();
230234
})
231235
.Case<mlir::Float8E8M0FNUType>([&](mlir::Type) -> LogicalResult {
232236
if (!(isRoundingModeRZ || isRoundingModeRP)) {
233237
return emitOpError("Only RZ and RP rounding modes are supported for "
234238
"conversions from f32x2 to ")
235-
<< mlir::Float8E8M0FNUType::get(getContext()) << " type";
239+
<< mlir::Float8E8M0FNUType::get(ctx) << " type";
236240
}
237241
if (hasRelu) {
238242
return emitOpError("relu not supported for conversions to ")
239-
<< mlir::Float8E8M0FNUType::get(getContext()) << " type";
243+
<< mlir::Float8E8M0FNUType::get(ctx) << " type";
240244
}
241245
return success();
242246
})
243247
.Default([this](mlir::Type) {
244248
return emitOpError("Only ")
245-
<< mlir::Float8E4M3FNType::get(getContext()) << ", "
246-
<< mlir::Float8E5M2Type::get(getContext()) << ", and "
247-
<< mlir::Float8E8M0FNUType::get(getContext())
249+
<< mlir::Float8E4M3FNType::get(ctx) << ", "
250+
<< mlir::Float8E5M2Type::get(ctx) << ", and "
251+
<< mlir::Float8E8M0FNUType::get(ctx)
248252
<< " types are "
249253
"supported for conversions from f32x2 to f8x2";
250254
});
251255
}
252256

253257
LogicalResult ConvertF16x2ToF8x2Op::verify() {
258+
llvm::LLVMContext &ctx = getContext();
259+
254260
if (!llvm::isa<mlir::Float8E4M3FNType, mlir::Float8E5M2Type>(getDstTy())) {
255261
return emitOpError("Only ")
256-
<< mlir::Float8E4M3FNType::get(getContext()) << " and "
257-
<< mlir::Float8E5M2Type::get(getContext())
262+
<< mlir::Float8E4M3FNType::get(ctx) << " and "
263+
<< mlir::Float8E5M2Type::get(ctx)
258264
<< " types are supported for conversions from f16x2 to f8x2.";
259265
}
260266
return success();

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