[BOLT][PPC] Add unit test.

Author: kostasalv

bolt/include/bolt/Target/PowerPC/PPCMCPlusBuilder.h

@@ -0,0 +1,17 @@
+#pragma once
+
+#include "bolt/Core/MCPlusBuilder.h"
+
+namespace llvm {
+namespace bolt {
+
+class PPCMCPlusBuilder : public MCPlusBuilder {
+public:
+  using MCPlusBuilder::MCPlusBuilder;
+
+  static void createPushRegisters(MCInst &Inst1, MCInst &Inst2, MCPhysReg Reg1,
+                                  MCPhysReg Reg2);
+};
+
+} // namespace bolt
+} // namespace llvm

bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp

@@ -10,6 +10,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "bolt/Target/PowerPC/PPCMCPlusBuilder.h"
 #include "bolt/Core/MCPlusBuilder.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCRegisterInfo.h"
@@ -21,27 +22,21 @@
 namespace llvm {
 namespace bolt {
 
-class PPCMCPlusBuilder : public MCPlusBuilder {
-public:
-  using MCPlusBuilder::MCPlusBuilder;
-
-  // Create instructions to push two registers onto the stack
-  static void createPushRegisters(MCInst &Inst1, MCInst &Inst2, MCPhysReg Reg1,
-                                  MCPhysReg /*Reg2*/) {
-
-    Inst1.clear();
-    Inst1.setOpcode(PPC::STDU);
-    Inst1.addOperand(MCOperand::createReg(PPC::R1)); // destination (SP)
-    Inst1.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
-    Inst1.addOperand(MCOperand::createImm(-16));     // offset
-
-    Inst2.clear();
-    Inst2.setOpcode(PPC::STD);
-    Inst2.addOperand(MCOperand::createReg(Reg1));    // source register
-    Inst2.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
-    Inst2.addOperand(MCOperand::createImm(0));       // offset
-  }
-};
+// Create instructions to push two registers onto the stack
+void PPCMCPlusBuilder::createPushRegisters(MCInst &Inst1, MCInst &Inst2,
+                                           MCPhysReg Reg1, MCPhysReg /*Reg2*/) {
+  Inst1.clear();
+  Inst1.setOpcode(PPC::STDU);
+  Inst1.addOperand(MCOperand::createReg(PPC::R1)); // destination (SP)
+  Inst1.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
+  Inst1.addOperand(MCOperand::createImm(-16));     // offset
+
+  Inst2.clear();
+  Inst2.setOpcode(PPC::STD);
+  Inst2.addOperand(MCOperand::createReg(Reg1));    // source register
+  Inst2.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
+  Inst2.addOperand(MCOperand::createImm(0));       // offset
+}
 
 MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *Analysis,
                                           const MCInstrInfo *Info,

bolt/unittests/CMakeLists.txt

@@ -7,3 +7,4 @@ endfunction()
 
 add_subdirectory(Core)
 add_subdirectory(Profile)
+add_subdirectory(Target)

bolt/unittests/Target/CMakeLists.txt

@@ -0,0 +1 @@
+add_subdirectory(PowerPC)

bolt/unittests/Target/PowerPC/CMakeLists.txt

@@ -0,0 +1,20 @@
+set(BOLTTargetPowerPCTestsSources
+    PPCMCPlusBuilderTest.cpp)
+
+add_bolt_unittest(BOLTTargetPowerPCTests
+  ${BOLTTargetPowerPCTestsSources}
+)
+
+target_link_libraries(BOLTTargetPowerPCTests PRIVATE
+  LLVMBOLTTargetPowerPC
+  LLVMBOLTCore
+  LLVMCore
+)
+
+target_include_directories(BOLTTargetPowerPCTests PRIVATE
+  ${LLVM_BINARY_DIR}/include
+  ${LLVM_SOURCE_DIR}/include
+  ${LLVM_SOURCE_DIR}/bolt/include
+  ${LLVM_BINARY_DIR}/tools/bolt/include
+  ${CMAKE_SOURCE_DIR}
+)

bolt/unittests/Target/PowerPC/PPCMCPlusBuilderTest.cpp

@@ -0,0 +1,53 @@
+//===- bolt/unittest/Target/PowerPC/PPCMCPlusBuilderTest.cpp
+//-------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "bolt/Target/PowerPC/PPCMCPlusBuilder.h"
+#include "bolt/Core/MCPlusBuilder.h"
+#include "llvm/MC/MCInst.h"
+#include "gtest/gtest.h"
+#define GET_INSTRINFO_ENUM
+#include "llvm/Target/PowerPC/PPCGenInstrInfo.inc"
+#define GET_REGINFO_ENUM
+#include "llvm/Target/PowerPC/PPCGenRegisterInfo.inc"
+
+using namespace llvm;
+using namespace bolt;
+
+namespace {
+
+TEST(PPCMCPlusBuilderTest, CreatePushRegisters) {
+  // Set up dummy input registers
+  MCInst Inst1, Inst2;
+  MCPhysReg Reg1 = PPC::R3; // Arbitary register
+
+  // Call the method under test
+  PPCMCPlusBuilder::createPushRegisters(Inst1, Inst2, Reg1, /*Reg2=*/PPC::R4);
+
+  // Check Inst1 is STDU R1, R1, -16
+  EXPECT_EQ(Inst1.getOpcode(), PPC::STDU);
+  ASSERT_EQ(Inst1.getNumOperands(), 3u);
+  EXPECT_TRUE(Inst1.getOperand(0).isReg());
+  EXPECT_EQ(Inst1.getOperand(0).getReg(), PPC::R1);
+  EXPECT_TRUE(Inst1.getOperand(1).isReg());
+  EXPECT_EQ(Inst1.getOperand(1).getReg(), PPC::R1);
+  EXPECT_TRUE(Inst1.getOperand(2).isImm());
+  EXPECT_EQ(Inst1.getOperand(2).getImm(), -16);
+
+  // Check Inst2 is STD Reg1, R1, 0
+  EXPECT_EQ(Inst2.getOpcode(), PPC::STD);
+  ASSERT_EQ(Inst2.getNumOperands(), 3u);
+  EXPECT_TRUE(Inst2.getOperand(0).isReg());
+  EXPECT_EQ(Inst2.getOperand(0).getReg(), Reg1);
+  EXPECT_TRUE(Inst2.getOperand(1).isReg());
+  EXPECT_EQ(Inst2.getOperand(1).getReg(), PPC::R1);
+  EXPECT_TRUE(Inst2.getOperand(2).isImm());
+  EXPECT_EQ(Inst2.getOperand(2).getImm(), 0);
+}
+
+} // end anonymous namespace