Removed redundant test commands and added comments to add.ll for the missing test

Author: gandhi56

llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp

@@ -503,7 +503,8 @@ void RegBankLegalizeHelper::lowerUnpackMinMax(MachineInstr &MI) {
 void RegBankLegalizeHelper::lowerScalarizeV2S16(MachineInstr &MI) {
   auto CastOp1 = B.buildBitcast(SgprRB_S32, MI.getOperand(1).getReg());
   auto CastOp2 = B.buildBitcast(SgprRB_S32, MI.getOperand(2).getReg());
-  auto NewInstr = B.buildInstr(MI.getOpcode(), {SgprRB_S32}, {CastOp1, CastOp2});
+  auto NewInstr =
+      B.buildInstr(MI.getOpcode(), {SgprRB_S32}, {CastOp1, CastOp2});
   B.buildBitcast({SgprRB, V2S16}, NewInstr.getReg(0));
   MI.eraseFromParent();
 }

llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll

@@ -196,8 +196,9 @@ define i32 @v_add_i32(i32 %a, i32 %b) {
   ret i32 %c
 }
 
-; TODO: Add test for s_add_v2i16. Instruction selector currently fails
-; to handle G_UNMERGE_VALUES. Same in GlobalISel/sub.ll.
+; TODO: Add test for s_add_v2i16. The current test does not work
+; due to a bug associated with
+; AMDGPURegBankLegalizeCombiner::tryEliminateReadAnyLane(..)
 
 define <2 x i16> @v_add_v2i16(<2 x i16> %a, <2 x i16> %b) {
 ; GFX7-LABEL: v_add_v2i16:

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir

@@ -1,6 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=amdgpu-regbankselect,amdgpu-regbanklegalize %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=amdgpu-regbankselect,amdgpu-regbanklegalize %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=amdgpu-regbankselect,amdgpu-regbanklegalize %s -verify-machineinstrs -o - | FileCheck %s
 
 ---
 name: add_v2s16_ss