fix test

Author: jaidTw

llvm/test/CodeGen/RISCV/machine-outliner-lpad.ll

@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple riscv64 -mattr=+experimental-zicfilp < %s | FileCheck %s --check-prefixes=CHECK,RV64
-; RUN: llc -mtriple riscv32 -mattr=+experimental-zicfilp < %s | FileCheck %s --check-prefixes=CHECK,RV32
+; RUN: llc -mtriple riscv64 -mattr=+experimental-zicfilp < %s | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -mtriple riscv32 -mattr=+experimental-zicfilp < %s | FileCheck %s --check-prefixes=CHECK
 
 define i16 @test1(i16 %x) #0 {
 ; CHECK-LABEL: test1:
@@ -63,6 +63,3 @@ attributes #0 = { minsize }
 
 !0 = !{i32 8, !"cf-protection-branch", i32 1}
 !1 = !{i32 1, !"cf-branch-label-scheme", !"unlabeled"}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; RV32: {{.*}}
-; RV64: {{.*}}