- Fix comment in SelectRDSVLShiftImm

kmclaughlin-arm · kmclaughlin-arm · commit 166f030cf221 · 2025-09-05T15:14:36.000Z
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -941,7 +941,7 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue &Imm) {
 }
 
 // Given `cntsd = (rdsvl, #1) >> 3`, attempt to return a suitable multiplier
-// for RDSVL to calculate `cntsd << N`, i.e. `rdsvl, #(N - 3)`.
+// for RDSVL to calculate `cntsd << N`, i.e. `rdsvl, #(1 << (N - 3))`.
 template <signed Low, signed High>
 bool AArch64DAGToDAGISel::SelectRDSVLShiftImm(SDValue N, SDValue &Imm) {
   if (!isa<ConstantSDNode>(N))

Original file line number	Diff line number	Diff line change
`@@ -941,7 +941,7 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue &Imm) {`
`941`	`941`	`}`
`942`	`942`
`943`	`943`	// Given `cntsd = (rdsvl, #1) >> 3`, attempt to return a suitable multiplier
`944`		-// for RDSVL to calculate `cntsd << N`, i.e. `rdsvl, #(N - 3)`.
	`944`	+// for RDSVL to calculate `cntsd << N`, i.e. `rdsvl, #(1 << (N - 3))`.
`945`	`945`	`template <signed Low, signed High>`
`946`	`946`	`bool AArch64DAGToDAGISel::SelectRDSVLShiftImm(SDValue N, SDValue &Imm) {`
`947`	`947`	`if (!isa<ConstantSDNode>(N))`