[DAGCombiner] Turn (neg (max x, (neg x))) into (min x, (neg x))

We already have a rule to turn `(neg (abs x))` into `(min x, (neg x))`.
But in some cases `(neg (max x, (neg x)))` is formed by an expanded
`abs` followed by a `neg` that is only generated after the expansion.
This patch adds a separate pattern to match this kind of cases.

Author: mshockwave

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@@ -3949,6 +3949,20 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
       if (SDValue Result = TLI.expandABS(N1.getNode(), DAG, true))
         return Result;
 
+    // Similar to the previous rule, but this time targeting an expanded abs.
+    // (sub 0, (max X, (sub 0, X))) --> (min X, (sub 0, X))
+    // Note that this is applicable to both signed and unsigned min/max.
+    SDValue X;
+    if (LegalOperations &&
+        sd_match(N1,
+                 m_OneUse(m_AnyOf(m_SMax(m_Value(X), m_Neg(m_Deferred(X))),
+                                  m_UMax(m_Value(X), m_Neg(m_Deferred(X))))))) {
+      unsigned MinOpc = N1->getOpcode() == ISD::SMAX ? ISD::SMIN : ISD::UMIN;
+      if (hasOperation(MinOpc, VT))
+        return DAG.getNode(MinOpc, DL, VT, X,
+                           DAG.getNode(ISD::SUB, DL, VT, N0, X));
+    }
+
     // Fold neg(splat(neg(x)) -> splat(x)
     if (VT.isVector()) {
       SDValue N1S = DAG.getSplatValue(N1, true);

llvm/test/CodeGen/RISCV/neg-abs.ll

@@ -273,8 +273,7 @@ define i32 @expanded_neg_abs32(i32 %x) {
 ; RV32ZBB-LABEL: expanded_neg_abs32:
 ; RV32ZBB:       # %bb.0:
 ; RV32ZBB-NEXT:    neg a1, a0
-; RV32ZBB-NEXT:    max a0, a1, a0
-; RV32ZBB-NEXT:    neg a0, a0
+; RV32ZBB-NEXT:    min a0, a0, a1
 ; RV32ZBB-NEXT:    ret
 ;
 ; RV64I-LABEL: expanded_neg_abs32:
@@ -315,8 +314,7 @@ define i32 @expanded_neg_abs32_unsigned(i32 %x) {
 ; RV32ZBB-LABEL: expanded_neg_abs32_unsigned:
 ; RV32ZBB:       # %bb.0:
 ; RV32ZBB-NEXT:    neg a1, a0
-; RV32ZBB-NEXT:    maxu a0, a1, a0
-; RV32ZBB-NEXT:    neg a0, a0
+; RV32ZBB-NEXT:    minu a0, a0, a1
 ; RV32ZBB-NEXT:    ret
 ;
 ; RV64I-LABEL: expanded_neg_abs32_unsigned:
@@ -405,8 +403,7 @@ define i64 @expanded_neg_abs64(i64 %x) {
 ; RV64ZBB-LABEL: expanded_neg_abs64:
 ; RV64ZBB:       # %bb.0:
 ; RV64ZBB-NEXT:    neg a1, a0
-; RV64ZBB-NEXT:    max a0, a1, a0
-; RV64ZBB-NEXT:    neg a0, a0
+; RV64ZBB-NEXT:    min a0, a0, a1
 ; RV64ZBB-NEXT:    ret
   %n = sub i64 0, %x
   %t = call i64 @llvm.smax.i64(i64 %n, i64 %x)
@@ -476,8 +473,7 @@ define i64 @expanded_neg_abs64_unsigned(i64 %x) {
 ; RV64ZBB-LABEL: expanded_neg_abs64_unsigned:
 ; RV64ZBB:       # %bb.0:
 ; RV64ZBB-NEXT:    neg a1, a0
-; RV64ZBB-NEXT:    maxu a0, a1, a0
-; RV64ZBB-NEXT:    neg a0, a0
+; RV64ZBB-NEXT:    minu a0, a0, a1
 ; RV64ZBB-NEXT:    ret
   %n = sub i64 0, %x
   %t = call i64 @llvm.umax.i64(i64 %n, i64 %x)