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--Added changes to support name change for SPV_INTEL_blocking_pipes to SPV_ALTERA_blocking_pipes.
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-52
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‎llvm/docs/SPIRVUsage.rst‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -241,7 +241,7 @@ Below is a list of supported SPIR-V extensions, sorted alphabetically by their e
241241
- Adds predicated load and store instructions that conditionally read from or write to memory based on a boolean predicate.
242242
* - ``SPV_KHR_maximal_reconvergence``
243243
- Adds execution mode and capability to enable maximal reconvergence.
244-
* - ``SPV_INTEL_blocking_pipes``
244+
* - ``SPV_ALTERA_blocking_pipes``
245245
- Adds new pipe read and write functions that have blocking semantics instead of the non-blocking semantics of the existing pipe read/write functions.
246246

247247
SPIR-V representation in LLVM IR

‎llvm/lib/Target/SPIRV/SPIRVBuiltins.td‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1176,9 +1176,9 @@ defm : DemangledNativeBuiltin<"clock_read_hilo_device", OpenCL_std, KernelClock,
11761176
defm : DemangledNativeBuiltin<"clock_read_hilo_work_group", OpenCL_std, KernelClock, 0, 0, OpReadClockKHR>;
11771177
defm : DemangledNativeBuiltin<"clock_read_hilo_sub_group", OpenCL_std, KernelClock, 0, 0, OpReadClockKHR>;
11781178

1179-
//SPV_INTEL_blocking_pipes
1180-
defm : DemangledNativeBuiltin<"__spirv_WritePipeBlockingINTEL", OpenCL_std, BlockingPipes, 0, 0, OpWritePipeBlockingINTEL>;
1181-
defm : DemangledNativeBuiltin<"__spirv_ReadPipeBlockingINTEL", OpenCL_std, BlockingPipes, 0, 0, OpReadPipeBlockingINTEL>;
1179+
//SPV_ALTERA_blocking_pipes
1180+
defm : DemangledNativeBuiltin<"__spirv_WritePipeBlockingINTEL", OpenCL_std, BlockingPipes, 0, 0, OpWritePipeBlockingALTERA>;
1181+
defm : DemangledNativeBuiltin<"__spirv_ReadPipeBlockingINTEL", OpenCL_std, BlockingPipes, 0, 0, OpReadPipeBlockingALTERA>;
11821182
defm : DemangledNativeBuiltin<"__spirv_ReadClockKHR", OpenCL_std, KernelClock, 1, 1, OpReadClockKHR>;
11831183

11841184
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -160,8 +160,8 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
160160
SPIRV::Extension::Extension::SPV_KHR_maximal_reconvergence},
161161
{"SPV_INTEL_kernel_attributes",
162162
SPIRV::Extension::Extension::SPV_INTEL_kernel_attributes},
163-
{"SPV_INTEL_blocking_pipes",
164-
SPIRV::Extension::Extension::SPV_INTEL_blocking_pipes}};
163+
{"SPV_ALTERA_blocking_pipes",
164+
SPIRV::Extension::Extension::SPV_ALTERA_blocking_pipes}};
165165

166166
bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
167167
StringRef ArgValue,

‎llvm/lib/Target/SPIRV/SPIRVInstrInfo.td‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -994,8 +994,8 @@ def OpPredicatedLoadINTEL: Op<6528, (outs ID:$res), (ins TYPE:$resType, ID:$ptr,
994994
def OpPredicatedStoreINTEL: Op<6529, (outs), (ins ID:$ptr, ID:$object, ID:$predicate, variable_ops),
995995
"OpPredicatedStoreINTEL $ptr $object $predicate">;
996996

997-
//SPV_INTEL_blocking_pipes
998-
def OpReadPipeBlockingINTEL :Op<5946, (outs), (ins ID:$pipe, ID:$pointer, ID:$packetSize, ID:$packetAlignment),
999-
"OpReadPipeBlockingINTEL $pipe $pointer $packetSize $packetAlignment">;
1000-
def OpWritePipeBlockingINTEL :Op<5946, (outs), (ins ID:$pipe, ID:$pointer, ID:$packetSize, ID:$packetAlignment),
1001-
"OpWritePipeBlockingINTEL $pipe $pointer $packetSize $packetAlignment">;
997+
//SPV_ALTERA_blocking_pipes
998+
def OpReadPipeBlockingALTERA :Op<5946, (outs), (ins ID:$pipe, ID:$pointer, ID:$packetSize, ID:$packetAlignment),
999+
"OpReadPipeBlockingALTERA $pipe $pointer $packetSize $packetAlignment">;
1000+
def OpWritePipeBlockingALTERA :Op<5946, (outs), (ins ID:$pipe, ID:$pointer, ID:$packetSize, ID:$packetAlignment),
1001+
"OpWritePipeBlockingALTERA $pipe $pointer $packetSize $packetAlignment">;

‎llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1885,11 +1885,11 @@ void addInstrRequirements(const MachineInstr &MI,
18851885
Reqs.addCapability(
18861886
SPIRV::Capability::CooperativeMatrixCheckedInstructionsINTEL);
18871887
break;
1888-
case SPIRV::OpReadPipeBlockingINTEL:
1889-
case SPIRV::OpWritePipeBlockingINTEL:
1890-
if (ST.canUseExtension(SPIRV::Extension::SPV_INTEL_blocking_pipes)) {
1891-
Reqs.addExtension(SPIRV::Extension::SPV_INTEL_blocking_pipes);
1892-
Reqs.addCapability(SPIRV::Capability::BlockingPipesINTEL);
1888+
case SPIRV::OpReadPipeBlockingALTERA:
1889+
case SPIRV::OpWritePipeBlockingALTERA:
1890+
if (ST.canUseExtension(SPIRV::Extension::SPV_ALTERA_blocking_pipes)) {
1891+
Reqs.addExtension(SPIRV::Extension::SPV_ALTERA_blocking_pipes);
1892+
Reqs.addCapability(SPIRV::Capability::BlockingPipesALTERA);
18931893
}
18941894
break;
18951895
case SPIRV::OpCooperativeMatrixGetElementCoordINTEL:

‎llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,7 +309,7 @@ defm SPV_KHR_shader_clock : ExtensionOperand<54, [EnvVulkan, EnvOpenCL]>;
309309
defm SPV_INTEL_unstructured_loop_controls : ExtensionOperand<55, [EnvOpenCL]>;
310310
defm SPV_EXT_demote_to_helper_invocation : ExtensionOperand<56, [EnvVulkan]>;
311311
defm SPV_INTEL_fpga_reg : ExtensionOperand<57, [EnvOpenCL]>;
312-
defm SPV_INTEL_blocking_pipes : ExtensionOperand<58, [EnvOpenCL]>;
312+
defm SPV_ALTERA_blocking_pipes : ExtensionOperand<58, [EnvOpenCL]>;
313313
defm SPV_GOOGLE_user_type : ExtensionOperand<59, [EnvVulkan]>;
314314
defm SPV_KHR_physical_storage_buffer : ExtensionOperand<60, [EnvVulkan]>;
315315
defm SPV_INTEL_kernel_attributes : ExtensionOperand<61, [EnvOpenCL]>;
@@ -611,7 +611,7 @@ defm TensorFloat32RoundingINTEL : CapabilityOperand<6425, 0, 0, [SPV_INTEL_tenso
611611
defm BFloat16TypeKHR : CapabilityOperand<5116, 0, 0, [SPV_KHR_bfloat16], []>;
612612
defm BFloat16DotProductKHR : CapabilityOperand<5117, 0, 0, [SPV_KHR_bfloat16], [BFloat16TypeKHR]>;
613613
defm BFloat16CooperativeMatrixKHR : CapabilityOperand<5118, 0, 0, [SPV_KHR_bfloat16], [BFloat16TypeKHR, CooperativeMatrixKHR]>;
614-
defm BlockingPipesINTEL : CapabilityOperand<5945, 0, 0, [SPV_INTEL_blocking_pipes], []>;
614+
defm BlockingPipesALTERA : CapabilityOperand<5945, 0, 0, [SPV_ALTERA_blocking_pipes], []>;
615615

616616
//===----------------------------------------------------------------------===//
617617
// Multiclass used to define SourceLanguage enum values and at the same time

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_blocking_pipes/PipeBlocking.ll‎ renamed to ‎llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll‎

Lines changed: 12 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,23 @@
1-
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_INTEL_blocking_pipes %s -o - | FileCheck %s --check-prefixes=CHECK-SPIRV
2-
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_blocking_pipes %s -o - -filetype=obj | spirv-val %}
1+
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_ALTERA_blocking_pipes %s -o - | FileCheck %s --check-prefixes=CHECK-SPIRV
2+
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_ALTERA_blocking_pipes %s -o - -filetype=obj | spirv-val %}
33

44
%opencl.pipe_ro_t = type opaque
55
%opencl.pipe_wo_t = type opaque
66

7-
; CHECK-SPIRV: OpCapability BlockingPipesINTEL
8-
; CHECK-SPIRV: OpExtension "SPV_INTEL_blocking_pipes"
7+
; CHECK-SPIRV: OpCapability BlockingPipesALTERA
8+
; CHECK-SPIRV: OpExtension "SPV_ALTERA_blocking_pipes"
99
; CHECK-SPIRV: %[[PipeRTy:[0-9]+]] = OpTypePipe ReadOnly
1010
; CHECK-SPIRV: %[[PipeWTy:[0-9]+]] = OpTypePipe WriteOnly
1111
; CHECK-SPIRV: %[[PipeR1:[0-9]+]] = OpLoad %[[PipeRTy]] %[[#]] Aligned 8
12-
; CHECK-SPIRV: OpReadPipeBlockingINTEL %[[PipeR1]] %[[#]] %[[#]] %[[#]]
12+
; CHECK-SPIRV: OpReadPipeBlockingALTERA %[[PipeR1]] %[[#]] %[[#]] %[[#]]
1313
; CHECK-SPIRV: %[[PipeR2:[0-9]+]] = OpLoad %[[PipeRTy]] %[[#]] Aligned 8
14-
; CHECK-SPIRV: OpReadPipeBlockingINTEL %[[PipeR2]] %[[#]] %[[#]] %[[#]]
14+
; CHECK-SPIRV: OpReadPipeBlockingALTERA %[[PipeR2]] %[[#]] %[[#]] %[[#]]
1515
; CHECK-SPIRV: %[[PipeW1:[0-9]+]] = OpLoad %[[PipeWTy]] %[[#]] Aligned 8
16-
; CHECK-SPIRV: OpWritePipeBlockingINTEL %[[PipeW1]] %[[#]] %[[#]] %[[#]]
16+
; CHECK-SPIRV: OpWritePipeBlockingALTERA %[[PipeW1]] %[[#]] %[[#]] %[[#]]
1717
; CHECK-SPIRV: %[[PipeW2:[0-9]+]] = OpLoad %[[PipeWTy]] %[[#]] Aligned 8
18-
; CHECK-SPIRV: OpWritePipeBlockingINTEL %[[PipeW2]] %[[#]] %[[#]] %[[#]]
18+
; CHECK-SPIRV: OpWritePipeBlockingALTERA %[[PipeW2]] %[[#]] %[[#]] %[[#]]
1919

20-
21-
; Function Attrs: convergent noinline nounwind optnone
22-
define spir_func void @foo(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
20+
define spir_func void @foo(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) {
2321
entry:
2422
%p.addr = alloca target("spirv.Pipe", 0), align 8
2523
%ptr.addr = alloca ptr addrspace(1), align 8
@@ -34,8 +32,7 @@ entry:
3432

3533
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
3634

37-
; Function Attrs: convergent noinline nounwind optnone
38-
define spir_func void @bar(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
35+
define spir_func void @bar(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) {
3936
entry:
4037
%p.addr = alloca target("spirv.Pipe", 0), align 8
4138
%ptr.addr = alloca ptr addrspace(1), align 8
@@ -50,8 +47,7 @@ entry:
5047

5148
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
5249

53-
; Function Attrs: convergent noinline nounwind optnone
54-
define spir_func void @boo(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
50+
define spir_func void @boo(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) {
5551
entry:
5652
%p.addr = alloca target("spirv.Pipe", 1), align 8
5753
%ptr.addr = alloca ptr addrspace(1), align 8
@@ -66,8 +62,7 @@ entry:
6662

6763
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
6864

69-
; Function Attrs: convergent noinline nounwind optnone
70-
define spir_func void @baz(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
65+
define spir_func void @baz(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) {
7166
entry:
7267
%p.addr = alloca target("spirv.Pipe", 1), align 8
7368
%ptr.addr = alloca ptr addrspace(1), align 8
@@ -85,7 +80,6 @@ declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pi
8580
; CHECK-LLVM: declare spir_func void @__read_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
8681
; CHECK-LLVM: declare spir_func void @__write_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
8782

88-
; Function Attrs: convergent mustprogress norecurse nounwind
8983
define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(ptr addrspace(4) align 2 dereferenceable(2) %_Data) {
9084
entry:
9185
%_Data.addr = alloca ptr addrspace(4), align 8
@@ -101,15 +95,4 @@ entry:
10195
}
10296

10397
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
104-
105-
attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
106-
107-
!llvm.module.flags = !{!0}
108-
!opencl.ocl.version = !{!1}
109-
!opencl.spir.version = !{!1}
110-
!llvm.ident = !{!2}
111-
112-
!0 = !{i32 1, !"wchar_size", i32 4}
113-
!1 = !{i32 2, i32 0}
114-
!2 = !{!"clang version 9.0.0 (https://github.com/MrSidims/llvm.git c627b787284c5bcc917ea9742908baa1b856e176)"}
11598

‎mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -395,7 +395,7 @@ def SPV_INTEL_fpga_buffer_location : I32EnumAttrCase<"SPV_INTEL_fp
395395
def SPV_INTEL_arbitrary_precision_fixed_point : I32EnumAttrCase<"SPV_INTEL_arbitrary_precision_fixed_point", 4019>;
396396
def SPV_INTEL_usm_storage_classes : I32EnumAttrCase<"SPV_INTEL_usm_storage_classes", 4020>;
397397
def SPV_INTEL_io_pipes : I32EnumAttrCase<"SPV_INTEL_io_pipes", 4021>;
398-
def SPV_INTEL_blocking_pipes : I32EnumAttrCase<"SPV_INTEL_blocking_pipes", 4022>;
398+
def SPV_ALTERA_blocking_pipes : I32EnumAttrCase<"SPV_ALTERA_blocking_pipes", 4022>;
399399
def SPV_INTEL_fpga_reg : I32EnumAttrCase<"SPV_INTEL_fpga_reg", 4023>;
400400
def SPV_INTEL_long_constant_composite : I32EnumAttrCase<"SPV_INTEL_long_constant_composite", 4024>;
401401
def SPV_INTEL_optnone : I32EnumAttrCase<"SPV_INTEL_optnone", 4025>;
@@ -465,7 +465,7 @@ def SPIRV_ExtensionAttr :
465465
SPV_INTEL_kernel_attributes, SPV_INTEL_fpga_memory_accesses,
466466
SPV_INTEL_fpga_cluster_attributes, SPV_INTEL_loop_fuse,
467467
SPV_INTEL_fpga_buffer_location, SPV_INTEL_arbitrary_precision_fixed_point,
468-
SPV_INTEL_usm_storage_classes, SPV_INTEL_io_pipes, SPV_INTEL_blocking_pipes,
468+
SPV_INTEL_usm_storage_classes, SPV_INTEL_io_pipes, SPV_ALTERA_blocking_pipes,
469469
SPV_INTEL_fpga_reg, SPV_INTEL_long_constant_composite, SPV_INTEL_optnone,
470470
SPV_INTEL_debug_module, SPV_INTEL_fp_fast_math_mode,
471471
SPV_INTEL_memory_access_aliasing, SPV_INTEL_split_barrier,
@@ -807,9 +807,9 @@ def SPIRV_C_IOPipesINTEL : I32EnumAttrCase<"IOPip
807807
Extension<[SPV_INTEL_io_pipes]>
808808
];
809809
}
810-
def SPIRV_C_BlockingPipesINTEL : I32EnumAttrCase<"BlockingPipesINTEL", 5945> {
810+
def SPIRV_C_BlockingPipesALTERA : I32EnumAttrCase<"BlockingPipesALTERA", 5945> {
811811
list<Availability> availability = [
812-
Extension<[SPV_INTEL_blocking_pipes]>
812+
Extension<[SPV_ALTERA_blocking_pipes]>
813813
];
814814
}
815815
def SPIRV_C_FPGARegINTEL : I32EnumAttrCase<"FPGARegINTEL", 5948> {
@@ -1519,7 +1519,7 @@ def SPIRV_CapabilityAttr :
15191519
SPIRV_C_FPGAMemoryAccessesINTEL, SPIRV_C_FPGAClusterAttributesINTEL,
15201520
SPIRV_C_LoopFuseINTEL, SPIRV_C_MemoryAccessAliasingINTEL,
15211521
SPIRV_C_FPGABufferLocationINTEL, SPIRV_C_ArbitraryPrecisionFixedPointINTEL,
1522-
SPIRV_C_USMStorageClassesINTEL, SPIRV_C_IOPipesINTEL, SPIRV_C_BlockingPipesINTEL,
1522+
SPIRV_C_USMStorageClassesINTEL, SPIRV_C_IOPipesINTEL, SPIRV_C_BlockingPipesALTERA,
15231523
SPIRV_C_FPGARegINTEL, SPIRV_C_DotProductInputAll,
15241524
SPIRV_C_DotProductInput4x8BitPacked, SPIRV_C_DotProduct, SPIRV_C_RayCullMaskKHR,
15251525
SPIRV_C_CooperativeMatrixKHR, SPIRV_C_ReplicatedCompositesEXT,

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