@@ -903,155 +903,155 @@ def cv_uimm6 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isUInt<6>(Imm);}]> {
903903
904904def cv_imm8: Operand<XLenVT>, TImmLeaf<XLenVT, [{return isUInt<8>(Imm);}]>;
905905
906- class PatCorevGprGpr <string intr, string asm> :
906+ class PatCoreVGprGpr <string intr, string asm> :
907907 PatGprGpr<!cast<Intrinsic>("int_riscv_cv_simd_" # intr),
908908 !cast<RVInst>("CV_" # asm)>;
909909
910910// Note that rd is the last argument
911- class PatCorevGprGprGpr <string intr, string asm> :
911+ class PatCoreVGprGprGpr <string intr, string asm> :
912912 Pat<(!cast<Intrinsic>("int_riscv_cv_simd_" # intr) GPR:$rs1, GPR:$rs2, GPR:$rd),
913913 (!cast<RVInst>("CV_" # asm) GPR:$rd, GPR:$rs1, GPR:$rs2)>;
914914
915- class PatCorevGprTImm <string intr, string asm> :
915+ class PatCoreVGprTImm <string intr, string asm> :
916916 PatGprImm<!cast<Intrinsic>("int_riscv_cv_simd_" # intr),
917917 !cast<RVInst>("CV_" # asm), cv_tsimm6>;
918918
919- class PatCorevGprImm <string intr, string asm> :
919+ class PatCoreVGprImm <string intr, string asm> :
920920 PatGprImm<!cast<Intrinsic>("int_riscv_cv_simd_" # intr),
921921 !cast<RVInst>("CV_" # asm), simm6>;
922922
923- class PatCorevGprUImm <string intr, string asm> :
923+ class PatCoreVGprUImm <string intr, string asm> :
924924 PatGprImm<!cast<Intrinsic>("int_riscv_cv_simd_" # intr),
925925 !cast<RVInst>("CV_" # asm), cv_uimm6>;
926926
927- multiclass PatCorevGprGprHB <string intr> {
928- def : PatCorevGprGpr <intr # "_h", NAME # "_H">;
929- def : PatCorevGprGpr <intr # "_b", NAME # "_B">;
927+ multiclass PatCoreVGprGprHB <string intr> {
928+ def : PatCoreVGprGpr <intr # "_h", NAME # "_H">;
929+ def : PatCoreVGprGpr <intr # "_b", NAME # "_B">;
930930}
931931
932- multiclass PatCorevGprGprGprHB <string intr> {
933- def : PatCorevGprGprGpr <intr # "_h", NAME # "_H">;
934- def : PatCorevGprGprGpr <intr # "_b", NAME # "_B">;
932+ multiclass PatCoreVGprGprGprHB <string intr> {
933+ def : PatCoreVGprGprGpr <intr # "_h", NAME # "_H">;
934+ def : PatCoreVGprGprGpr <intr # "_b", NAME # "_B">;
935935}
936936
937- multiclass PatCorevGprTImmHB <string intr> {
938- def : PatCorevGprTImm <intr # "_h", NAME # "_H">;
939- def : PatCorevGprTImm <intr # "_b", NAME # "_B">;
937+ multiclass PatCoreVGprTImmHB <string intr> {
938+ def : PatCoreVGprTImm <intr # "_h", NAME # "_H">;
939+ def : PatCoreVGprTImm <intr # "_b", NAME # "_B">;
940940}
941941
942- multiclass PatCorevGprImmHB <string intr> {
943- def : PatCorevGprImm <intr # "_h", NAME # "_H">;
944- def : PatCorevGprImm <intr # "_b", NAME # "_B">;
942+ multiclass PatCoreVGprImmHB <string intr> {
943+ def : PatCoreVGprImm <intr # "_h", NAME # "_H">;
944+ def : PatCoreVGprImm <intr # "_b", NAME # "_B">;
945945}
946946
947- multiclass PatCorevGprUImmHB <string intr> {
948- def : PatCorevGprUImm <intr # "_h", NAME # "_H">;
949- def : PatCorevGprUImm <intr # "_b", NAME # "_B">;
947+ multiclass PatCoreVGprUImmHB <string intr> {
948+ def : PatCoreVGprUImm <intr # "_h", NAME # "_H">;
949+ def : PatCoreVGprUImm <intr # "_b", NAME # "_B">;
950950}
951951
952- class PatCorevGprGprDiv <Intrinsic intr, string asm, int div> :
952+ class PatCoreVGprGprDiv <Intrinsic intr, string asm, int div> :
953953 Pat<(intr GPR:$rs1, GPR:$rs2, (i32 div)),
954954 (!cast<RVInst>("CV_" # asm) GPR:$rs1, GPR:$rs2)>;
955955
956- class PatCorevGprGprGprDiv <Intrinsic intr, string asm, int div> :
956+ class PatCoreVGprGprGprDiv <Intrinsic intr, string asm, int div> :
957957 Pat<(intr GPR:$rd, GPR:$rs1, GPR:$rs2, (i32 div)),
958958 (!cast<RVInst>("CV_" # asm) GPR:$rd, GPR:$rs1, GPR:$rs2)>;
959959
960- class PatCorevGprShuffle <Intrinsic intr, RVInst inst, int s> :
960+ class PatCoreVGprShuffle <Intrinsic intr, RVInst inst, int s> :
961961 Pat<(intr GPR:$rs1, (i32 s)),
962962 (inst GPR:$rs1, 0)>;
963963
964- multiclass PatCorevGprGprDivAll <Intrinsic intr> {
965- def : PatCorevGprGprDiv <intr, NAME # "_DIV2", 1>;
966- def : PatCorevGprGprDiv <intr, NAME # "_DIV4", 2>;
967- def : PatCorevGprGprDiv <intr, NAME # "_DIV8", 3>;
964+ multiclass PatCoreVGprGprDivAll <Intrinsic intr> {
965+ def : PatCoreVGprGprDiv <intr, NAME # "_DIV2", 1>;
966+ def : PatCoreVGprGprDiv <intr, NAME # "_DIV4", 2>;
967+ def : PatCoreVGprGprDiv <intr, NAME # "_DIV8", 3>;
968968}
969969
970- multiclass PatCorevGprGprGprDivAll <Intrinsic intr> {
971- def : PatCorevGprGprGprDiv <intr, NAME # "_DIV2", 1>;
972- def : PatCorevGprGprGprDiv <intr, NAME # "_DIV4", 2>;
973- def : PatCorevGprGprGprDiv <intr, NAME # "_DIV8", 3>;
970+ multiclass PatCoreVGprGprGprDivAll <Intrinsic intr> {
971+ def : PatCoreVGprGprGprDiv <intr, NAME # "_DIV2", 1>;
972+ def : PatCoreVGprGprGprDiv <intr, NAME # "_DIV4", 2>;
973+ def : PatCoreVGprGprGprDiv <intr, NAME # "_DIV8", 3>;
974974}
975975
976- class PatCorevGpr <string intr, string asm> :
976+ class PatCoreVGpr <string intr, string asm> :
977977 PatGpr<!cast<Intrinsic>("int_riscv_cv_simd_" # intr),
978- !cast<RVInst>("CV_" # asm)>;
978+ !cast<RVInst>("CV_" # asm)>;
979979
980- multiclass PatCorevGprHB <string intr> {
981- def : PatCorevGpr <intr # "_h", NAME # "_H">;
982- def : PatCorevGpr <intr # "_b", NAME # "_B">;
980+ multiclass PatCoreVGprHB <string intr> {
981+ def : PatCoreVGpr <intr # "_h", NAME # "_H">;
982+ def : PatCoreVGpr <intr # "_b", NAME # "_B">;
983983}
984984
985- multiclass PatCorevBinary <string intr, bit exclude_h = false> {
985+ multiclass PatCoreVBinary <string intr, bit exclude_h = false> {
986986 if exclude_h then {
987- def : PatCorevGprGpr <intr # "_b", NAME # "_B">;
987+ def : PatCoreVGprGpr <intr # "_b", NAME # "_B">;
988988 } else {
989- defm NAME : PatCorevGprGprHB <intr>;
989+ defm NAME : PatCoreVGprGprHB <intr>;
990990 }
991- defm NAME # "_SC" : PatCorevGprGprHB <intr # "_sc">;
992- defm NAME # "_SCI" : PatCorevGprImmHB <intr # "_sc">;
991+ defm NAME # "_SC" : PatCoreVGprGprHB <intr # "_sc">;
992+ defm NAME # "_SCI" : PatCoreVGprImmHB <intr # "_sc">;
993993}
994994
995- multiclass PatCorevBinaryUnsigned <string intr> {
996- defm NAME : PatCorevGprGprHB <intr>;
997- defm NAME # "_SC" : PatCorevGprGprHB <intr # "_sc">;
998- defm NAME # "_SCI" : PatCorevGprUImmHB <intr # "_sc">;
995+ multiclass PatCoreVBinaryUnsigned <string intr> {
996+ defm NAME : PatCoreVGprGprHB <intr>;
997+ defm NAME # "_SC" : PatCoreVGprGprHB <intr # "_sc">;
998+ defm NAME # "_SCI" : PatCoreVGprUImmHB <intr # "_sc">;
999999}
10001000
1001- multiclass PatCorevTernary <string intr> {
1002- defm NAME : PatCorevGprGprGprHB <intr>;
1003- defm NAME # "_SC" : PatCorevGprGprGprHB <intr # "_sc">;
1001+ multiclass PatCoreVTernary <string intr> {
1002+ defm NAME : PatCoreVGprGprGprHB <intr>;
1003+ defm NAME # "_SC" : PatCoreVGprGprGprHB <intr # "_sc">;
10041004 def : Pat<(!cast<Intrinsic>("int_riscv_cv_simd_" # intr # "_sc_h") GPR:$rs1, simm6:$rs2, GPR:$rd),
10051005 (!cast<RVInst>("CV_" # NAME # "_SCI_H") GPR:$rd, GPR:$rs1, simm6:$rs2)>;
10061006 def : Pat<(!cast<Intrinsic>("int_riscv_cv_simd_" # intr # "_sc_b") GPR:$rs1, simm6:$rs2, GPR:$rd),
10071007 (!cast<RVInst>("CV_" # NAME # "_SCI_B") GPR:$rd, GPR:$rs1, simm6:$rs2)>;
10081008}
10091009
1010- multiclass PatCorevTernaryUnsigned <string intr> {
1011- defm NAME : PatCorevGprGprGprHB <intr>;
1012- defm NAME # "_SC" : PatCorevGprGprGprHB <intr # "_sc">;
1010+ multiclass PatCoreVTernaryUnsigned <string intr> {
1011+ defm NAME : PatCoreVGprGprGprHB <intr>;
1012+ defm NAME # "_SC" : PatCoreVGprGprGprHB <intr # "_sc">;
10131013 def : Pat<(!cast<Intrinsic>("int_riscv_cv_simd_" # intr # "_sc_h") GPR:$rs1, cv_uimm6:$rs2, GPR:$rd),
10141014 (!cast<RVInst>("CV_" # NAME # "_SCI_H") GPR:$rd, GPR:$rs1, cv_uimm6:$rs2)>;
10151015 def : Pat<(!cast<Intrinsic>("int_riscv_cv_simd_" # intr # "_sc_b") GPR:$rs1, cv_uimm6:$rs2, GPR:$rd),
10161016 (!cast<RVInst>("CV_" # NAME # "_SCI_B") GPR:$rd, GPR:$rs1, cv_uimm6:$rs2)>;
10171017}
10181018
10191019let Predicates = [HasVendorXCVsimd] in {
1020- defm ADD : PatCorevBinary <"add", true>;
1021- def : PatCorevGprGprDiv <int_riscv_cv_simd_add_h, "ADD_H", 0>;
1022- defm SUB : PatCorevBinary <"sub", true>;
1023- def : PatCorevGprGprDiv <int_riscv_cv_simd_sub_h, "SUB_H", 0>;
1024- defm AVG : PatCorevBinary <"avg">;
1025- defm AVGU : PatCorevBinaryUnsigned <"avgu">;
1026- defm MIN : PatCorevBinary <"min">;
1027- defm MINU : PatCorevBinaryUnsigned <"minu">;
1028- defm MAX : PatCorevBinary <"max">;
1029- defm MAXU : PatCorevBinaryUnsigned <"maxu">;
1030- defm SRL : PatCorevBinaryUnsigned <"srl">;
1031- defm SRA : PatCorevBinaryUnsigned <"sra">;
1032- defm SLL : PatCorevBinaryUnsigned <"sll">;
1033- defm OR : PatCorevBinary <"or">;
1034- defm XOR : PatCorevBinary <"xor">;
1035- defm AND : PatCorevBinary <"and">;
1036-
1037- defm ABS : PatCorevGprHB <"abs">;
1038-
1039- defm DOTUP : PatCorevBinaryUnsigned <"dotup">;
1040- defm DOTUSP : PatCorevBinary <"dotusp">;
1041- defm DOTSP : PatCorevBinary <"dotsp">;
1042- defm SDOTUP : PatCorevTernaryUnsigned <"sdotup">;
1043- defm SDOTUSP : PatCorevTernary <"sdotusp">;
1044- defm SDOTSP : PatCorevTernary <"sdotsp">;
1045-
1046- defm EXTRACT : PatCorevGprTImmHB <"extract">;
1047- defm EXTRACTU : PatCorevGprTImmHB <"extractu">;
1020+ defm ADD : PatCoreVBinary <"add", true>;
1021+ def : PatCoreVGprGprDiv <int_riscv_cv_simd_add_h, "ADD_H", 0>;
1022+ defm SUB : PatCoreVBinary <"sub", true>;
1023+ def : PatCoreVGprGprDiv <int_riscv_cv_simd_sub_h, "SUB_H", 0>;
1024+ defm AVG : PatCoreVBinary <"avg">;
1025+ defm AVGU : PatCoreVBinaryUnsigned <"avgu">;
1026+ defm MIN : PatCoreVBinary <"min">;
1027+ defm MINU : PatCoreVBinaryUnsigned <"minu">;
1028+ defm MAX : PatCoreVBinary <"max">;
1029+ defm MAXU : PatCoreVBinaryUnsigned <"maxu">;
1030+ defm SRL : PatCoreVBinaryUnsigned <"srl">;
1031+ defm SRA : PatCoreVBinaryUnsigned <"sra">;
1032+ defm SLL : PatCoreVBinaryUnsigned <"sll">;
1033+ defm OR : PatCoreVBinary <"or">;
1034+ defm XOR : PatCoreVBinary <"xor">;
1035+ defm AND : PatCoreVBinary <"and">;
1036+
1037+ defm ABS : PatCoreVGprHB <"abs">;
1038+
1039+ defm DOTUP : PatCoreVBinaryUnsigned <"dotup">;
1040+ defm DOTUSP : PatCoreVBinary <"dotusp">;
1041+ defm DOTSP : PatCoreVBinary <"dotsp">;
1042+ defm SDOTUP : PatCoreVTernaryUnsigned <"sdotup">;
1043+ defm SDOTUSP : PatCoreVTernary <"sdotusp">;
1044+ defm SDOTSP : PatCoreVTernary <"sdotsp">;
1045+
1046+ defm EXTRACT : PatCoreVGprTImmHB <"extract">;
1047+ defm EXTRACTU : PatCoreVGprTImmHB <"extractu">;
10481048 def : Pat<(int_riscv_cv_simd_insert_b GPR:$rd, GPR:$rs1, cv_tsimm6:$imm),
10491049 (CV_INSERT_B GPR:$rd, GPR:$rs1, cv_tsimm6:$imm)>;
10501050 def : Pat<(int_riscv_cv_simd_insert_h GPR:$rd, GPR:$rs1, cv_tsimm6:$imm),
10511051 (CV_INSERT_H GPR:$rd, GPR:$rs1, cv_tsimm6:$imm)>;
10521052
1053- defm SHUFFLE : PatCorevGprGprHB <"shuffle">;
1054- def : PatCorevGprTImm <"shuffle_sci_h", "SHUFFLE_SCI_H">;
1053+ defm SHUFFLE : PatCoreVGprGprHB <"shuffle">;
1054+ def : PatCoreVGprTImm <"shuffle_sci_h", "SHUFFLE_SCI_H">;
10551055 let usesCustomInserter = 1 in
10561056 def PseudoCV_SHUFFLE_SCI_B : Pseudo<(outs GPR:$rd), (ins GPR:$rs, cv_imm8:$imm), []>;
10571057 def : PatGprImm<int_riscv_cv_simd_shuffle_sci_b, PseudoCV_SHUFFLE_SCI_B, cv_imm8>;
@@ -1061,34 +1061,34 @@ let Predicates = [HasVendorXCVsimd] in {
10611061 def : Pat<(int_riscv_cv_simd_shuffle2_b GPR:$rs1, GPR:$rs2, GPR:$rd),
10621062 (CV_SHUFFLE2_B GPR:$rd, GPR:$rs1, GPR:$rs2)>;
10631063
1064- def : PatCorevGprGpr <"packhi_h", "PACK_H">;
1065- def : PatCorevGprGpr <"packlo_h", "PACK">;
1064+ def : PatCoreVGprGpr <"packhi_h", "PACK_H">;
1065+ def : PatCoreVGprGpr <"packlo_h", "PACK">;
10661066 def : Pat<(int_riscv_cv_simd_packhi_b GPR:$rd, GPR:$rs1, GPR:$rs2),
10671067 (CV_PACKHI_B GPR:$rd, GPR:$rs1, GPR:$rs2)>;
10681068 def : Pat<(int_riscv_cv_simd_packlo_b GPR:$rd, GPR:$rs1, GPR:$rs2),
10691069 (CV_PACKLO_B GPR:$rd, GPR:$rs1, GPR:$rs2)>;
10701070
1071- defm CMPEQ : PatCorevBinary <"cmpeq">;
1072- defm CMPNE : PatCorevBinary <"cmpne">;
1073- defm CMPGT : PatCorevBinary <"cmpgt">;
1074- defm CMPGE : PatCorevBinary <"cmpge">;
1075- defm CMPLT : PatCorevBinary <"cmplt">;
1076- defm CMPLE : PatCorevBinary <"cmple">;
1077- defm CMPGTU : PatCorevBinaryUnsigned <"cmpgtu">;
1078- defm CMPGEU : PatCorevBinaryUnsigned <"cmpgeu">;
1079- defm CMPLTU : PatCorevBinaryUnsigned <"cmpltu">;
1080- defm CMPLEU : PatCorevBinaryUnsigned <"cmpleu">;
1081-
1082- def : PatCorevGprGprGprDiv <int_riscv_cv_simd_cplxmul_r, "CPLXMUL_R", 0>;
1083- defm CPLXMUL_R : PatCorevGprGprGprDivAll <int_riscv_cv_simd_cplxmul_r>;
1084- def : PatCorevGprGprGprDiv <int_riscv_cv_simd_cplxmul_i, "CPLXMUL_I", 0>;
1085- defm CPLXMUL_I : PatCorevGprGprGprDivAll <int_riscv_cv_simd_cplxmul_i>;
1086-
1087- def : PatCorevGpr <"cplxconj", "CPLXCONJ">;
1088-
1089- def : PatCorevGprGprDiv <int_riscv_cv_simd_subrotmj, "SUBROTMJ", 0>;
1090- defm SUBROTMJ : PatCorevGprGprDivAll <int_riscv_cv_simd_subrotmj>;
1091-
1092- defm ADD : PatCorevGprGprDivAll <int_riscv_cv_simd_add_h>;
1093- defm SUB : PatCorevGprGprDivAll <int_riscv_cv_simd_sub_h>;
1071+ defm CMPEQ : PatCoreVBinary <"cmpeq">;
1072+ defm CMPNE : PatCoreVBinary <"cmpne">;
1073+ defm CMPGT : PatCoreVBinary <"cmpgt">;
1074+ defm CMPGE : PatCoreVBinary <"cmpge">;
1075+ defm CMPLT : PatCoreVBinary <"cmplt">;
1076+ defm CMPLE : PatCoreVBinary <"cmple">;
1077+ defm CMPGTU : PatCoreVBinaryUnsigned <"cmpgtu">;
1078+ defm CMPGEU : PatCoreVBinaryUnsigned <"cmpgeu">;
1079+ defm CMPLTU : PatCoreVBinaryUnsigned <"cmpltu">;
1080+ defm CMPLEU : PatCoreVBinaryUnsigned <"cmpleu">;
1081+
1082+ def : PatCoreVGprGprGprDiv <int_riscv_cv_simd_cplxmul_r, "CPLXMUL_R", 0>;
1083+ defm CPLXMUL_R : PatCoreVGprGprGprDivAll <int_riscv_cv_simd_cplxmul_r>;
1084+ def : PatCoreVGprGprGprDiv <int_riscv_cv_simd_cplxmul_i, "CPLXMUL_I", 0>;
1085+ defm CPLXMUL_I : PatCoreVGprGprGprDivAll <int_riscv_cv_simd_cplxmul_i>;
1086+
1087+ def : PatCoreVGpr <"cplxconj", "CPLXCONJ">;
1088+
1089+ def : PatCoreVGprGprDiv <int_riscv_cv_simd_subrotmj, "SUBROTMJ", 0>;
1090+ defm SUBROTMJ : PatCoreVGprGprDivAll <int_riscv_cv_simd_subrotmj>;
1091+
1092+ defm ADD : PatCoreVGprGprDivAll <int_riscv_cv_simd_add_h>;
1093+ defm SUB : PatCoreVGprGprDivAll <int_riscv_cv_simd_sub_h>;
10941094} // Predicates = [HasVendorXCVsimd]
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