Commenting. Remove two stale #include:s.

Author: JonPsson1

llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp

@@ -7,8 +7,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "SystemZMachineScheduler.h"
-#include "llvm/CodeGen/LiveInterval.h"
-#include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/MachineLoopInfo.h"
 
 using namespace llvm;
@@ -198,7 +196,7 @@ static int biasPhysRegExtra(const SUnit *SU) {
     return Res;
 
   // Also recognize Load Address of stack slot. There are (at least
-  // currently) no instructions here defining a physreg that uses a vreg.
+  // currently) no instructions here defining a physreg that use a vreg.
   const MachineInstr *MI = SU->getInstr();
   if (MI->getNumOperands() && !MI->isCopy()) {
     const MachineOperand &DefMO = MI->getOperand(0);

llvm/lib/Target/SystemZ/SystemZMachineScheduler.h

@@ -8,11 +8,11 @@
 
 // -------------------------- Pre RA scheduling ----------------------------- //
 //
-// SystemZPreRASchedStrategy keeps track of currently live registers and first
-// tries to reduce live ranges by scheduling e.g. a load of a live register
-// immediately (bottom-up). It also aims to preserve the scheduled latency.
-// Small regions (up to 10 instructions) are mostly left alone as the input
-// order is usually then preferred.
+// SystemZPreRASchedStrategy tries to reduce register pressure by applying
+// OOO heuristics and then also in certain regions reduces latency. Tiny
+// regions are mostly left alone as the input order is usually then preferred
+// (due to copys involving physregs and comparison elimination
+// opportunities).
 //
 // -------------------------- Post RA scheduling ---------------------------- //
 //