@@ -1038,6 +1038,37 @@ mlir::LogicalResult CIRToLLVMGlobalOpLowering::matchAndRewrite(
10381038 return mlir::success ();
10391039}
10401040
1041+ mlir::LogicalResult CIRToLLVMSwitchFlatOpLowering::matchAndRewrite (
1042+ cir::SwitchFlatOp op, OpAdaptor adaptor,
1043+ mlir::ConversionPatternRewriter &rewriter) const {
1044+
1045+ llvm::SmallVector<mlir::APInt, 8 > caseValues;
1046+ if (op.getCaseValues ()) {
1047+ for (mlir::Attribute val : op.getCaseValues ()) {
1048+ auto intAttr = dyn_cast<cir::IntAttr>(val);
1049+ caseValues.push_back (intAttr.getValue ());
1050+ }
1051+ }
1052+
1053+ llvm::SmallVector<mlir::Block *, 8 > caseDestinations;
1054+ llvm::SmallVector<mlir::ValueRange, 8 > caseOperands;
1055+
1056+ for (mlir::Block *x : op.getCaseDestinations ()) {
1057+ caseDestinations.push_back (x);
1058+ }
1059+
1060+ for (mlir::OperandRange x : op.getCaseOperands ()) {
1061+ caseOperands.push_back (x);
1062+ }
1063+
1064+ // Set switch op to branch to the newly created blocks.
1065+ rewriter.setInsertionPoint (op);
1066+ rewriter.replaceOpWithNewOp <mlir::LLVM::SwitchOp>(
1067+ op, adaptor.getCondition (), op.getDefaultDestination (),
1068+ op.getDefaultOperands (), caseValues, caseDestinations, caseOperands);
1069+ return mlir::success ();
1070+ }
1071+
10411072mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite (
10421073 cir::UnaryOp op, OpAdaptor adaptor,
10431074 mlir::ConversionPatternRewriter &rewriter) const {
@@ -1641,6 +1672,7 @@ void ConvertCIRToLLVMPass::runOnOperation() {
16411672 CIRToLLVMGetGlobalOpLowering,
16421673 CIRToLLVMGetMemberOpLowering,
16431674 CIRToLLVMSelectOpLowering,
1675+ CIRToLLVMSwitchFlatOpLowering,
16441676 CIRToLLVMShiftOpLowering,
16451677 CIRToLLVMStackSaveOpLowering,
16461678 CIRToLLVMStackRestoreOpLowering,
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