Skip to content

Commit 3a6f20d

Browse files
committed
Drop v4f64 SHUFPD/VPERMILPI handling - now that its handled by general v4f64 shuffle concatenation
1 parent 9787398 commit 3a6f20d

File tree

1 file changed

+1
-2
lines changed

1 file changed

+1
-2
lines changed

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58671,7 +58671,6 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5867158671
break;
5867258672
}
5867358673
case X86ISD::SHUFP: {
58674-
// TODO: Add SHUFPD support if/when necessary.
5867558674
if (!IsSplat &&
5867658675
(VT == MVT::v8f32 ||
5867758676
(VT == MVT::v16f32 && Subtarget.useAVX512Regs())) &&
@@ -58740,7 +58739,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5874058739
DAG.getNode(X86ISD::VPERMILPI, DL, FloatVT, Res, Op0.getOperand(1));
5874158740
return DAG.getBitcast(VT, Res);
5874258741
}
58743-
if (!IsSplat && (VT == MVT::v4f64 || VT == MVT::v8f64)) {
58742+
if (!IsSplat && VT == MVT::v8f64) {
5874458743
unsigned NumSubElts = Op0.getValueType().getVectorNumElements();
5874558744
uint64_t Mask = (1ULL << NumSubElts) - 1;
5874658745
uint64_t Idx = 0;

0 commit comments

Comments
 (0)