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| 1 | +; RUN: opt -S -dxil-op-lower %s | FileCheck %s |
| 2 | + |
| 3 | +target triple = "dxil-pc-shadermodel6.6-compute" |
| 4 | + |
| 5 | +define i32 @test_getdimensions_no_mips() { |
| 6 | + ; CHECK: [[HANDLE1:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, |
| 7 | + ; CHECK-NEXT: [[ANNOT_HANDLE1:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[HANDLE1]] |
| 8 | + %handle1 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) |
| 9 | + |
| 10 | + ; CHECK-NEXT: [[RETVAL1:%.*]] = call %dx.types.Dimensions @dx.op.getDimensions(i32 72, %dx.types.Handle [[ANNOT_HANDLE1]], i32 undef) |
| 11 | + %1 = call { i32, i32, i32, i32 } @llvm.dx.resource.getdimensions.tdx.RawBuffer_i32_1_0t(target("dx.TypedBuffer", <4 x float>, 0, 0, 0) %handle1, i32 poison) |
| 12 | + |
| 13 | + ; CHECK-NEXT: %[[DIM1:.*]] = extractvalue %dx.types.Dimensions [[RETVAL1]], 0 |
| 14 | + %2 = extractvalue { i32, i32, i32, i32 } %1, 0 |
| 15 | + |
| 16 | + ; CHECK-NEXT: ret i32 %[[DIM1]] |
| 17 | + ret i32 %2 |
| 18 | +} |
| 19 | + |
| 20 | + |
| 21 | +define i32 @test_getdimensions_with_0_mips() { |
| 22 | + ; CHECK: [[HANDLE2:%.*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 217, |
| 23 | + ; CHECK-NEXT: [[ANNOT_HANDLE2:%.*]] = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle [[HANDLE2]] |
| 24 | + %handle1 = call target("dx.RawBuffer", float, 0, 0) @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, ptr null) |
| 25 | + |
| 26 | + ; CHECK-NEXT: [[RETVAL2:%.*]] = call %dx.types.Dimensions @dx.op.getDimensions(i32 72, %dx.types.Handle [[ANNOT_HANDLE2]], i32 0) |
| 27 | + %1 = call { i32, i32, i32, i32 } @llvm.dx.resource.getdimensions.tdx.RawBuffer_i32_1_0t(target("dx.RawBuffer", float, 0, 0) %handle1, i32 0) |
| 28 | + |
| 29 | + ; CHECK-NEXT: %[[DIM2:.*]] = extractvalue %dx.types.Dimensions [[RETVAL2]], 0 |
| 30 | + %2 = extractvalue { i32, i32, i32, i32 } %1, 0 |
| 31 | + |
| 32 | + ; CHECK-NEXT: ret i32 %[[DIM2]] |
| 33 | + ret i32 %2 |
| 34 | +} |
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